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Old 22nd August 2012, 02:55 PM   #1011
Zen Mod is offline Zen Mod  Serbia
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@buzz

it certainly isn't , except in my scribing ......

but - you can't blame me for fact that boyz are not listening
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Old 22nd August 2012, 03:05 PM   #1012
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Thanks.
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Old 22nd August 2012, 03:14 PM   #1013
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Quote:
Originally Posted by Antoinel View Post
Zen Mod,

Please summarize the key findings of the ongoing Research and Development of Conceptual F6 by DIYers. This will also serve as a concise report to present to Mr. Pass. Thank you.

N.B. DIYers have been at it for a month to the date of post#1.
That's cool ! One month, a thousand posts ... on a concept ! Gives you an sense about the power and attraction of this design.... It's interesting how simple the idea is in principle, but how much harder it turns out to put into practice!
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Old 22nd August 2012, 03:26 PM   #1014
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Originally Posted by kasey197 View Post
That's cool ! One month, a thousand posts ... on a concept ! Gives you an sense about the power and attraction of this design.... It's interesting how simple the idea is in principle, but how much harder it turns out to put into practice!


kasey197: You are in a position to jot down several [undisputed] bullet points regarding the design and operation of Conceptual F6. For example the simple ones I know todate are:
  • The signal drives of the transformer's secondary are equal in amplitude and out of phase with each other[ i.e. matched per Pass]
  • The output JFETs are matched [per Pass]
  • The idle bias of the upper JFET is referenced to the output [or not; your point of view?].
Please expand on this list with other rock solid knowledge to also include output power, THD etc. Thanks

Last edited by Antoinel; 22nd August 2012 at 03:37 PM.
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Old 22nd August 2012, 03:34 PM   #1015
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Originally Posted by Antoinel View Post
kasey197: You are in a position to jot down several [undisputed] bullet points regarding the design and operation of Conceptual F6.
Ah ..., there is nothing undisputed so far about this design matey) just undisputed in my own head !! Am building the danged input buffers tonight (finally) so will post something unless one of he kids wakes up with a nightmare first !!!
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Old 22nd August 2012, 03:39 PM   #1016
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Originally Posted by kasey197 View Post
Ah ..., there is nothing undisputed so far about this design matey) just undisputed in my own head !! Am building the danged input buffers tonight (finally) so will post something unless one of he kids wakes up with a nightmare first !!!
Bonne nuit.
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Old 22nd August 2012, 04:25 PM   #1017
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Originally Posted by kasey197 View Post
Buzz, they're equal mate. The only other topology that has the same degree of symmetry is the circlotron..... IMHO of course
Theory, inspection and experimentation all arrive at the same point. I found that unlearning what I (thought) I understood was pretty hard. It's easier for some. And harder for others.
Actually, the circlotron is truly symmetric whereas the F6 (and quasi-complementary designs in general) has asymmetries due to the transformer parasitic capacitances.
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Old 22nd August 2012, 04:49 PM   #1018
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Old 22nd August 2012, 05:32 PM   #1019
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Originally Posted by lhquam View Post
Actually, the circlotron is truly symmetric whereas the F6 (and quasi-complementary designs in general) has asymmetries due to the transformer parasitic capacitances.
1 MOSFET does not output a semetrical sinewave at the input!
2 MOSFETs of the same type "may" have a curve sufficient to find an operating point where, the non lineararities(unsemetrical performance)(distorion) of one, is mirrored by the other, in which case the nonlinearities cancel. But, have you won the lottery lately?
Otherwise, I agree, the Circlotron has the best oportunity to be such a balanced, symetrical, linear design.
I'm not building an F6 after I'm done with my F4 & 5, I'm building a SiClotron
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Old 22nd August 2012, 05:57 PM   #1020
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Default CAPACITOR WARNING

I hate capacitors.

I have been experimenting with "tweaks" in my bias circuit in an attempt to lower THD at low frequencies and discovered that it is possible to provoke oscillation at .2-.3Hz, depending on the RC time constants related to the capacitors. Looking at the LTSpice AC analysis plots, there is a peak in the response at these frequencies and very bad phase margin.

I need to crack open the books and learn how to solve this problem.
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