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Old 30th March 2012, 08:27 PM   #871
generg is offline generg  Germany
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Thanks Juanitox, ......Good to hear!
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Old 30th March 2012, 08:33 PM   #872
Zen Mod is offline Zen Mod  Serbia
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feeding tube amp without load is big nono !

everything can sing - did you ever heard big honking T03 Motorola octet , in full blast ?

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Old 30th March 2012, 08:34 PM   #873
generg is offline generg  Germany
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@ juanitox

So the SIT can be comparable in sound quality with your tube amp and these really expensive Hashimoto output transformers?
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Old 31st March 2012, 07:27 AM   #874
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no way baby!! i have build two version of SET tube amp , one with RS241 and 6N6 driver with CCS load, Vcap , hashimoto trans and all MKP cap . and the last one i still have with AD1 and 26 triode driver. great sound , very refined and call it romantic
but with the Sit and now even more with the hammond load , i hav a full big sound everywhere , less romantism , more porn
as with the tube Set i could listening jazz and female voice very long time, with the Sit everything rocks .. and my choice of source resistor bypassed bring a llittle touch of 'tube sound" .. so i have now destroyed my tubes amp and sold all my expensive tubes on the bay
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Old 31st March 2012, 07:46 AM   #875
generg is offline generg  Germany
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Really, unbelievable......! Thanks for the comment!

So I feel even more happy to take part in this journey!
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Old 2nd April 2012, 12:17 AM   #876
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A few notes on Sony VFETs...

The rank is defined as a Vgs range for which Id=100mA at Vds=50V. The reason for this particular specification is that these are the typical operating voltages and quiescent currents in Sony's VFET amps that used these parts. Only the last digit of the rank is signifficant, the two letter and one number prefix are a date code of sorts or a batch code (no data on this but it can be surmised from a number of VFETs produced in the span of about 10 years). Adjecent rank numbers (except ranks 1 and 2) differ in Vgs by 2.5V for the given conditions.

There are two kinds of J28/K82. The original type was produced in multiple ranks and is probably only a pre-production run. This device uses a single 4x4mm silicon die. Since the pair was used exclusively in Sony's TA-N88 class D amp, the later devices became double die, each 3x3mm in size, the same as J18/K60. It is highly probable that these were sligtly differently processed and selected J18/K60 dies, a matched pair packed into a single TO3 case. These were only produced as rank 3. In this sense a J18/K60 is almost literally half of a J28/K82.

VFETs in general have a rather large spread of characteristics, so even within one rank there can be differences that can become significant depending on the operating point. It should be noted that Sony VFETs are more linear for higher voltages and lower currents, and the conditions used in this amp are not ideal - on the other hand, better conditions would require a load matching transformer.

Sony VFETs were originally developed to also have their use in fast switching. As such, their transconductance is lower, but compared to other contemporaries, and modern emerging devices, so are the capacitances. That being said, they are very high compared to a vacuum triode. As to the speed of the VFETs, the output stage of the TA-N88B swings 160V in about 50-80ns, this is equivalent to about 2.3kV/us slew rate. The switching frequency of the amp is 500kHz. This sort of performance is difficult to obtain using comparable discrete components even today, most modern discrete class D amps switch at around 200kHz.

This sort of performance does have it's ramifications for analog implementations. Although not as often as MOSFETs, VFETs will oscillate without a gate stopper and connected via long lines. The input capacitances are more linear than that of a MOSFET (particularly at higher Vds) but they are not trivial, and the device needs to be driven from a low source impedance. Also, being a junction FET, there is gate leakage current, usually on the order of 1uA (MOSFETs often manage several orders of magnitude less), so when testing do NOT insert a large gate resistor or the leakage current will create 'false bias' on it.

It is possible to quickly verify a VFET by connecting it in a self-bias arrangemet, lik a JFET current source (keep in mind though that unlike a regular JFET it does not have high output impedance pentode-like curves so it's really not a current source). Verifying rank is best done by using a 100ohm source resistor (do not forget the gate stopper!!! about 1k will do fine) and connecting the 'CCS' across 50-60V. Rank 3 produces around 10V on the source resistor (this is also equal to Vgs in this type of circuit).

One more thing that came up in the thread:
Do NOT use a lab power supply in constant current mode as a CCS. It's output normally has a capacitor across it and as a CCS it's extremely slow as it is (and may have other problems like a transformer winding switching system to minimize heat loss). THis can only be used for static testing.

Attached is a curve tracer plot of Id versus Vds at a number of Vgs settings for the Sony 2SK60. This is a composite of two measurements made on a Tek 576 tracer (because it normally only does up to 11 Vgs steps total), rank 6 device. This is a high voltage, low current plot, the scale is shown on the readout on the right, 50mA/div vertical (so the full height of the screen is 500mA), 20V/div horizontal (so the full width, being 12 divisions, equals 240V). Each Vgs step is -2V starting a 0V for the leftmost line. Note that the breakdown voltage is signifficantly over the 160V spec since the device operates without breakdown at 240V (don't bet on this for your particular part, 160V is guaranteed).
Note how the first few lines for low Vds are bunched together, this tendency continues to higher currents. However, if you look more to the right... I think no comment is needed.
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File Type: jpg 2SK60_1.jpg (44.1 KB, 493 views)

Last edited by ilimzn; 2nd April 2012 at 12:20 AM.
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Old 2nd April 2012, 12:49 AM   #877
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@ilimzn

Thanks for contributing a lot of great information to our little thread.
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Old 2nd April 2012, 06:38 AM   #878
generg is offline generg  Germany
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Thumbs up Thanks!

Quote:
Originally Posted by generg View Post
Really, unbelievable......! Thanks for the comment!

So I feel even more happy to take part in this journey!
I can only repeat:

" Really, unbelievable......! Thanks for the comment!

So I feel even more happy to take part in this journey!"

Thank you very much for this long seeked information ilimzm !
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Old 2nd April 2012, 09:32 AM   #879
ilimzn is offline ilimzn  Croatia
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I forgot one possibly important detail.

Using an unregulated power supply for the drain circuit, and regulated one for the gate bias may be somewhat dangerous - this can be verified by anyone who constructed a triode power amp with high transconductance triodes, like the Russian 6S33S for example, also the reason why self-bias is recommended for those types of triodes. In triode-speak, a VFET/SIT is a low voltage, extremely high transconductance triode, so it actually falls in this category.

Unlike a regular MOSFET or for that matter any solid state or vacuum amplifying device with high outpout impedance (also known as 'having pentode type curves'), the current through the device is almost independant of the voltage across it - it behaves like a current source, programmable by it's control electrode.
This, however, is NOT the case with triodes and VFET/SIT, and it's one area where designing with the latter is quite different than with other devices. Because they have a low ioutput impedance, the current through the device depends on both the voltage on the gate/grid and the voltage on the drain/anode.

In other words, providing a fixed Vgs bias does NOT guarantee proper biasing as the actual current and voltage across the device also depends on the drain supply voltage. In fact, relatively small increases in the drain supply voltage (say, due to mains voltage increase) can produce quite large increases in drain current, and the other way around - all at the same Vgs. The traditional way to solving this in tube circuits was NOT to have a regulated bias supply, so it would track changes to the anode supply, a higher positive anode supply would produce more negative grid bias, counteracting the increase of the anode current because of higher anode supply. This is also one reason why self-bias is often called auto-bias for triodes, as it works even better in that particular regard.

With a VFET/SIT the same can be done, BUT unlike triodes, where the device starts working with a heat-up delay, the SIT works immediately, and this is a problem. Normally, the heating-up of a triode's cathode would provide enough of a delay for all the voltages to stabilize, especially for the bias voltage to be present when the tube starts conducting current. In a SIT amplifier, one could use a well-filtered RC or cap multiplier supply for the bias, but a delay must be imposed on the drain supply so that it comes only when the bias voltage is present.

A lot of circuit gymnastics was done in VFET/SIT amps of the past (when these firts appeared) around this problem, which often added quite a bit of extra circuitry, to provide stable biasing that compensated for main power supply variations. One reason for this, which may not be so apparent, is that dependence of drain current to the power supply voltage generates intermodulation between multiples of the mains frequency and the audio signal in the output, and not only the actual multiples due to low power supply noise rejection - this is a natural result of the SIT not being ideally linear, one of those 'you can't beat the laws of physics' things.

Of course, there is another obvious route, and that was also used in a VFET amplifier, but only the one - Yamaha B1. Simply, the main rails are also regulated. Setting up the regulation carefully actually produces only minimal (and often negligible) extra heat losses, but puts a complete stop to the bias stability problem.

Another obvious way, peculiar to this particular simple topology, is the use of a current source. Make that a GOOD current source. BEcause the drain current is fixed by this CCS, the bias voltage only sets the voltage across the SIT. If the current source is reasonably good, it also provides excellent power supply noise rejection, and substantial savings in the size of the filter capacitors AND if you know how to dimension it right, power transformer, compared to resistors in the drain circuit (although, resistors provide a slightly lower output impedance of the amp and therefore slightly higher damping factor, but also less gain).

One important thing when deciding on the CCS to use - the voltage across the CCS can be a very important variable when it comes to selecting which device the CCS is implemented with. For low voltages (in the 5-15 or so volts region) MOSFETs can be a BIG problem because of their non-linear capacitances, which become most non-linear at low Vds and Vgd. Although the SIT amp has a very low output impedance for a single device non-feedback amp, and these capacitances are not a problem to drive, the real problem happens inside the CCS circuit, because the drain feeds back to the gate circuit of the MOSFET and modulates the current. Salas has provided a CCS circuit that is active with this regard, but one whould think about how fast it can be with nanofarads of apparent gate capacitance for the MOSFET (remember that there will be a signifficant 'Miller' capacitance present between D and G of the MOSFET).
FOr low voltages across the CCS a BJT current source will be a much better option. BJT SOA restrictions will not be a problem for this particular circuit as they happen at higher voltages (most power BJTs have full SOA until at least 30V or so). THe CCS also behaves quite well with only a volt or so across the BJT. However, BJTs also have non-linear capacitances, but for the actual ones suitable for this application, they will be smaller than a comparable MOSFET. Be that s it may, it is well advisable to use the smallest device (either BJT or MOSFET) that will carry the required current and work with the power dissipation/heat required, because that will insure the lowest capacitances and lest problems for the rest of the CCS circuit. Of course, dedicated circuits such as depletion mode MOSFETs that actually have extra circuitry on-board are a different class and their peculiarities must be handled on a per-case basis.
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Old 2nd April 2012, 11:00 AM   #880
Salas is online now Salas  Greece
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That suggested CCS that generg made was cascoded accounting for the high capacitance at low VDS Mosfet thing (especially when TO-247). We did not opt skipping the extra dissipation of adding another Mosfet to it exactly to control the capacitance bug. Suburra (i.e. Marco from Italy) plans to test out a full regulator and inductive drain load approach, so to achieve fixed supply, and improve on the PSRR and gate track drain supply thing right at the power source. Maybe a win win, he will see.
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