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Old 18th May 2011, 02:43 PM   #201
EUVL is offline EUVL  Europe
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Many thanks.

Patrick
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Old 20th May 2011, 01:24 AM   #202
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k , i've just gone through over one hundred 2sk170's and have yet to find but one under 8.00 (7.96) and Bill Fuss is reporting 9's to 10 from his batch , is there a reason for the low idss beyond the fact that NP mentioned 7.0 2sk170 ?
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Old 20th May 2011, 01:45 AM   #203
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Quote:
Originally Posted by Woody1911a1 View Post
k , i've just gone through over one hundred 2sk170's and have yet to find but one under 8.00 (7.96) and Bill Fuss is reporting 9's to 10 from his batch , is there a reason for the low idss beyond the fact that NP mentioned 7.0 2sk170 ?
I have matched quads and octets in that Idss range, if I can help.
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Old 20th May 2011, 02:18 AM   #204
EUVL is offline EUVL  Europe
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> is there a reason for the low idss beyond the fact that NP mentioned 7.0 2sk170 ?

Of course. For such a simple circuit, nothing is there by chance.

You can use 10mA Idss, or even 14mA, if you want. The circuit will still work.
But a higher front-end bias will mean smaller values of JFET drain resistors, and therefore lower open-loop gain, or less negative feedback.


Patrick
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Old 20th May 2011, 03:44 AM   #205
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Can you comment on the expected changes regarding the Input JFET "Degeneration trick" or does the previously stated formula apply?
thx
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Old 20th May 2011, 05:10 AM   #206
EUVL is offline EUVL  Europe
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> Can you comment on the expected changes regarding the Input JFET "Degeneration trick" or does the previously stated formula apply?

The degeneration still applies but you need to compare the Yfs value at that specific bias current, which you can either measure yourself (for both devices), or use the data sheet values.


Patrick
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Old 20th May 2011, 09:03 AM   #207
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Quote:
Originally Posted by EUVL View Post
> is there a reason for the low idss beyond the fact that NP mentioned 7.0 2sk170 ?

Of course. For such a simple circuit, nothing is there by chance.

You can use 10mA Idss, or even 14mA, if you want. The circuit will still work.
But a higher front-end bias will mean smaller values of JFET drain resistors, and therefore lower open-loop gain, or less negative feedback.


Patrick
These are very difficult to source, the 2sj74s i mean, i got some from AMB labs but they all have IDSS in the high 10mA range.
The matched sets from Spencer are in the same range.

2SK170BL in the 6mA and 7 mA range are easier to find.

Last edited by CeeVee; 20th May 2011 at 09:10 AM.
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Old 20th May 2011, 12:34 PM   #208
EUVL is offline EUVL  Europe
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This will serve as a guide line.
The Yfs values were taken from data sheet, so not 100% reliable.


Patrick
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Old 20th May 2011, 12:47 PM   #209
CeeVee is offline CeeVee  Portugal
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Thanks EUVL,

That's very helpfull...'course as true DIYers we always will try for the best
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Old 20th May 2011, 02:29 PM   #210
EUVL is offline EUVL  Europe
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You have to bear in mind that these figures, especially the Yfs, is read from data sheet and hence prone to error.
So use it as guide line only. It is not gospel.

If you want to be really exact, you have to measure the FETs to determine the real values.
There is no short cut, I am afraid.


Patrick
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