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Old 16th December 2012, 07:54 PM   #1181
davada is offline davada  Canada
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Quote:
Originally Posted by 1audio View Post
The fundamental is converted to something around 415 Hz I think. Its harmonics are in the output jack with the fundamental removed. The noise is also removed. The FFT will show you.

I have been looking at the simple FFT displays on e-bay to see if one would work for this. No need for exotics.

Attached is a snapshot I took of the distortion output measuring Victors oscillator. The tall peak is the 2nd Harmonic. 2-10 are shown in a bandpass to 5 KHz. This does not change with input frequency. You can also sync to the trigger output and see phase relationships.
Hi Demian,

What level is that 2nd H at?
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Old 16th December 2012, 08:23 PM   #1182
RNMarsh is offline RNMarsh  United States
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Default Wretched excess is good-

That looks super great. What do I have to do? Did you do the subtraction/summing idea you said were going to try?

Last edited by RNMarsh; 16th December 2012 at 08:26 PM.
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Old 16th December 2012, 09:04 PM   #1183
davada is offline davada  Canada
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Quote:
Originally Posted by RNMarsh View Post
That looks super great. What do I have to do? Did you do the subtraction/summing idea you said were going to try?
Hi Rick,

Well what you have to do is pack up your 725 and send it me....

Okay seriously.

I removed the Jfet feedback cap altogether and bypassed to the 2k resistor then trimmed
the amplitude adjust and distortion trim.

Yes I tried subtraction/summing idea and it did not work in this oscillator.
The disto was worse no matter how much trimming I did.

This oscillator keeps getting simpler and consequently it works better.

I'm still with the added wafer and more trims idea.

This will get you what you see and -110dB re-trimming at 10KHz unless this is all an effect of harmonic cancellation.

I blew up the original fet a couple of years ago and replaced it with the same from electronic Gmine.
It's not the HP selected fet.

Cheers,
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Old 16th December 2012, 09:17 PM   #1184
davada is offline davada  Canada
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Default 339a oscillator

Rick you do realize this is with an LT1468 for the oscillator and LME49710 metal can for the buffer.

The capacitors C32, C47, C48, C45, C46, C16, C17,C14, C15 removed. C49 changed to 0.1u polypropylene. All trims and level control pot replaced.
The quad op amp IC is a TL074 and get rid of the rest of the dangling parts.

Cheers,
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Last edited by davada; 16th December 2012 at 09:21 PM.
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Old 16th December 2012, 10:18 PM   #1185
RNMarsh is offline RNMarsh  United States
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Thats what i have done... except havent changed the output to LME49710 yet. Same quad opamp. Checking on all the caps. I'll short the 60mfd cap out and retune ampl/dist trim after replacing output with LME___. Thx-RNMarsh
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Old 17th December 2012, 02:23 AM   #1186
davada is offline davada  Canada
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Quote:
Originally Posted by RNMarsh View Post
Thats what i have done... except havent changed the output to LME49710 yet. Same quad opamp. Checking on all the caps. I'll short the 60mfd cap out and retune ampl/dist trim after replacing output with LME___. Thx-RNMarsh
What's good for 1KHz is no good for anything else. Although for the most part everything stays under -120dB.

There has to be a better way.
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Old 17th December 2012, 03:23 AM   #1187
RNMarsh is offline RNMarsh  United States
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Inverting the residual and summing with sine wave. Then you dont need super low distortion in the first place. easier said than done? -RNM
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Old 17th December 2012, 03:41 AM   #1188
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Originally Posted by davada View Post
I blew up the original fet a couple of years ago and replaced it with the same from electronic Gmine.
It's not the HP selected fet.

Cheers,
What is the gate bias at different frequencies? What part did you use? We may be able to find a better alternative. I would think that the lowest resistance will add the least distortion since the series resistor will attenuate the distortion contribution of the fet. I may have this backwards.

I have been thinking about the KH feedback around the FET trick. Perhaps there is a way to sense the distortion on the fet and compare it to the mostly undistorted main wave and feedback the non-linearity to "correct" it? I would think the distortion across the FET will be higher than the main signal and some sort of comparison can be made and a correction fed into the gate. What KH is doing I think is driving the FET gate to exactly 1/2 of whatever the overall signal is. Perhaps this will linearize the fet?

On Victor's oscillator I think the 2nd was around -120 but it may have been more like -130. I can't find my notes.
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Old 17th December 2012, 04:29 AM   #1189
davada is offline davada  Canada
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Quote:
Originally Posted by 1audio View Post
What is the gate bias at different frequencies? What part did you use? We may be able to find a better alternative. I would think that the lowest resistance will add the least distortion since the series resistor will attenuate the distortion contribution of the fet. I may have this backwards.

I have been thinking about the KH feedback around the FET trick. Perhaps there is a way to sense the distortion on the fet and compare it to the mostly undistorted main wave and feedback the non-linearity to "correct" it? I would think the distortion across the FET will be higher than the main signal and some sort of comparison can be made and a correction fed into the gate. What KH is doing I think is driving the FET gate to exactly 1/2 of whatever the overall signal is. Perhaps this will linearize the fet?

On Victor's oscillator I think the 2nd was around -120 but it may have been more like -130. I can't find my notes.
Hi Demian,

It's the same part. I bought 12 of them from Electronic Goldmine a couple of years ago.
Hp used selected VCR2N. I used the generic.

Bruce Hofer used a trick of routing the distorted fet signal back to the output of an SVO and summing the two signal together to cancel part of the fet generated part of the distortion. I don't know how I would apply this here.

If it wasn't for the Jfet and AGC, I don't think I could measure any distortion at all. At least not with what I have. If I can tweak it at 1KHz where just about everything is in the noise floor.... There has got to be a way.

Maybe I should try my novel multiplier. I was saving it for my SVO design and I wasn't going let it out of the bag until then. But maybe.


At 1KHz the gate voltage is -0.511Vdc. This is the optimal where there is barely any distortion. At 10KHz the gate voltage is -1.6Vdc. If I re-trim for best distortion the gate voltage is -0.624Vdc. The Jfet exhibits the least distortion when operated near its on resistance. This makes sense since the voltage across the fet is minimal. Sound familiar?

If we could hold the voltage across the fet constant there would be no distortion at all.
Cascading does this but we'd have to use another jfet and then we are right back where we started.

Cheers,

David.
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Old 17th December 2012, 04:33 AM   #1190
richiem is offline richiem  United States
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The lowest distortion is when the gate voltage approaches 0 and the channel R is lowest, but of course that isn't necessarily the best operating point for best general stability over temp, frequency, and other variables. And there is the issue of the correct drain voltage range set by the series and parallel resistors -- this is a tricky mix for sure. I've tried to keep the total resistance range, including the FET Rds range, to a factor of 2 or 3:1.

If David's approach to switching the oscillator gain trim for each range works well, then that might be able to be limited more, with a tighter range of Vds and gate voltage. This seems promising.
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