The value of one chip is given by the way you implement it.
I don't think the AD1892 is so bad at all, at least in configuration I have used it. The sound is just ok. Maybe in bypass mode it is, but I never intended to use it that way. End of story.
I designed this dac as a partner for cd-rom units. Increasing immunity to jitter in a simple way, multibit conversion and discrete output stage were the ideas of the design. I am no fan of digital filters myself, this is why I choosed not to upsample to 48 KHz and I keeped output rate to 44.1 KHz
This seemed to cause the confusion about the os/non-os issue, even with the help of the thread's title. This is an upsampled dac with output rate is 1:1, no more, no less.
Also I tested a lot of output stage configurations, including op's and resistors as I/V converters, solid state or tubes on output.
Maybe @Terry will explain why the circuit I used is not so good.. just curious.
I don't think the AD1892 is so bad at all, at least in configuration I have used it. The sound is just ok. Maybe in bypass mode it is, but I never intended to use it that way. End of story.
I designed this dac as a partner for cd-rom units. Increasing immunity to jitter in a simple way, multibit conversion and discrete output stage were the ideas of the design. I am no fan of digital filters myself, this is why I choosed not to upsample to 48 KHz and I keeped output rate to 44.1 KHz
This seemed to cause the confusion about the os/non-os issue, even with the help of the thread's title. This is an upsampled dac with output rate is 1:1, no more, no less.
Also I tested a lot of output stage configurations, including op's and resistors as I/V converters, solid state or tubes on output.
Maybe @Terry will explain why the circuit I used is not so good.. just curious.
Konnichiwa,
Up to a point.
That will depend on how good (or not) the ASRC is. It certainly manages (marketing figures not withstanding) to knock 3 Bit off the 20 Bit input Words. Now if it was a DAC that would be fine, as there would be resolution enough to to acommodate a 16 Bit word without losses. But I suspect that the loss of low level information will be retained to a similar degree with a 16 bit word.
Is that good or bad? Hard to say, one will have to listen. But it still strikes me as a poor approach to first maximise jitter and to then attempt to remove it with an ASRC process. Sorta like maximising open loop while throwing linearity out of the window and then attempting to get good measurements by using a ton of negative feedback.
BTW, my criticism is here against the chip maker, primarily. One cannot fault someone for believing the marketing guff that a ASRC "removes" or "rejects" jitter (instead of embedding it in the signal permanently in another domain).
But is that what actually happens? Does using a ASRC result in lower measured jitter if we use an actual signal (the Miller Jitter test would be ideal) and not if merely measure clock jitter (which in the context of an ASRC becomes meaningless)?
Then you may wish to consider not using one.
Yet the digital filter remains in circuit and does what it does. Of course, so do most likely several more ASRC's in the recording chain and of course the Digital filter in the AD converter prior to digital recording. And non of those filters are bypassable by the purchaser of the recording, so perhaps having a digital filter per se is not a problem?
I certainly find HDCD encoded CD's played back through a top grade HDCD equipped player preferable to a non-oversampling DAC replaying the same HDCD encoded recording and at tims I prefer recordings with a digital filter in (or an anlagoue anti-sinc filter). I think the topic is complex.
So a DAC with a digital filter and Asyncronous Sample Rate Conversion. No doubt fine for a simple Kit, it is just a shame that the chance to design something that would eliminate jitter (a RAM Buffer) was wasted for some pure marketing silicon which does nothing to reduce or eliminate jitter but merely transposes it.
Oh yes, one more hint. If you MUST have the ASRC (and so it seems with the AD1892) do try upsampling to 48KHz (or even the 48.8KHz postulated by AD in their Datasheet with a 25MHz clock), as there are very good reasons why upsampling to a frequency around 48KHz improves the sound in some (many?) cases on standard CD's.
Probably best to have switchable oscillators, one for 1:1 ASRC and one for "upsampling" to 48KHz. It might be even fun to try to listen to the Receiver with the ASRC disabled. The jitter would probably be about the same sort added by asyncronous re-clocking (you didn't think it would LOWER jitter, did you)?
Anyway, some thoughts here, just theorising and postulating. Not enough time or will right now to do anything about it. Maybe next year.
Sayonara
Lupulroz said:
Up to a point.
Lupulroz said:
That will depend on how good (or not) the ASRC is. It certainly manages (marketing figures not withstanding) to knock 3 Bit off the 20 Bit input Words. Now if it was a DAC that would be fine, as there would be resolution enough to to acommodate a 16 Bit word without losses. But I suspect that the loss of low level information will be retained to a similar degree with a 16 bit word.
Is that good or bad? Hard to say, one will have to listen. But it still strikes me as a poor approach to first maximise jitter and to then attempt to remove it with an ASRC process. Sorta like maximising open loop while throwing linearity out of the window and then attempting to get good measurements by using a ton of negative feedback.
BTW, my criticism is here against the chip maker, primarily. One cannot fault someone for believing the marketing guff that a ASRC "removes" or "rejects" jitter (instead of embedding it in the signal permanently in another domain).
Lupulroz said:
But is that what actually happens? Does using a ASRC result in lower measured jitter if we use an actual signal (the Miller Jitter test would be ideal) and not if merely measure clock jitter (which in the context of an ASRC becomes meaningless)?
Lupulroz said:
Then you may wish to consider not using one.
Lupulroz said:this is why I choosed not to upsample to 48 KHz and I keeped output rate to 44.1 KHz
Yet the digital filter remains in circuit and does what it does. Of course, so do most likely several more ASRC's in the recording chain and of course the Digital filter in the AD converter prior to digital recording. And non of those filters are bypassable by the purchaser of the recording, so perhaps having a digital filter per se is not a problem?
I certainly find HDCD encoded CD's played back through a top grade HDCD equipped player preferable to a non-oversampling DAC replaying the same HDCD encoded recording and at tims I prefer recordings with a digital filter in (or an anlagoue anti-sinc filter). I think the topic is complex.
Lupulroz said:
So a DAC with a digital filter and Asyncronous Sample Rate Conversion. No doubt fine for a simple Kit, it is just a shame that the chance to design something that would eliminate jitter (a RAM Buffer) was wasted for some pure marketing silicon which does nothing to reduce or eliminate jitter but merely transposes it.
Oh yes, one more hint. If you MUST have the ASRC (and so it seems with the AD1892) do try upsampling to 48KHz (or even the 48.8KHz postulated by AD in their Datasheet with a 25MHz clock), as there are very good reasons why upsampling to a frequency around 48KHz improves the sound in some (many?) cases on standard CD's.
Probably best to have switchable oscillators, one for 1:1 ASRC and one for "upsampling" to 48KHz. It might be even fun to try to listen to the Receiver with the ASRC disabled. The jitter would probably be about the same sort added by asyncronous re-clocking (you didn't think it would LOWER jitter, did you)?
Anyway, some thoughts here, just theorising and postulating. Not enough time or will right now to do anything about it. Maybe next year.
Sayonara
Lupulroz said:The value of one chip is given by the way you implement it.
I don't think the AD1892 is so bad at all, at least in configuration I have used it. The sound is just ok. Maybe in bypass mode it is, but I never intended to use it that way. End of story.
I designed this dac as a partner for cd-rom units. Increasing immunity to jitter in a simple way, multibit conversion and discrete output stage were the ideas of the design. I am no fan of digital filters myself, this is why I choosed not to upsample to 48 KHz and I keeped output rate to 44.1 KHz
This seemed to cause the confusion about the os/non-os issue, even with the help of the thread's title. This is an upsampled dac with output rate is 1:1, no more, no less.
Also I tested a lot of output stage configurations, including op's and resistors as I/V converters, solid state or tubes on output.
Maybe @Terry will explain why the circuit I used is not so good.. just curious.
Hi Lupulroz
I NOT say your I-V was not so good, I did however say that
IMO, the GBS type first proposed by Jocko and later developed
by others here is ultimately better.
It is simpler, uses an open loop approach and when implemented
correctly is extremely linear. We tried many different I-V's from
monolythic opamps, discrete opamps, discrete GBS and even
iterations using elements of base current feedback not unlike the
Baxandall super pair. We found simplest is best and linearity
can be as good as a closed loop approach.
From the feedback of those here that built the various
GBS iterations it seems they pretty much agree, it is a
winner.
WRT tubes, depending on the tube used they can impart
more colour and loose some resolution.
What tube I-V did you try?
Cheers,
Terry
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