Peter van Willenswaard's DAC??

[Guido Tent]

What are those white cylinders on the left, in the dac? Coils?

Foil capacitors

Ciao

 

[Guido Tent]

Guido,

From a technical point, what do you prefer,
nonsam or oversam,,,

fons

Guido,

from a musical point, what do you prefer,,
nonsam or oversam,,,

Guido,
will you give wazzup a answer.

fons

Hi,

Technical: Oversampling (but properly applied)
Musical: Non oversampling (no comment)

Bye

 

[wazzup]

Foil capacitors

Ciao

And what brand of foil caps? I`m quite interested in those... They look ...musical

 

[fons de boeck]

wazzup,

That's a question for Alex



fons

 

[wazzup]

I will ask him then, whenever I have another question for him. I will be building my Mp dac, soon as I finished my cd player. There will be a lot of questions, on THAT dac

Ciao

 

[Guido Tent]

And what brand of foil caps? I`m quite interested in those... They look ...musical

just asked Peter:

Arcotronics motor run caps.

Ciao

 

[wazzup]

Tnx Guido!

 

[martijn]

cd723 spdif

--According to the author Pierre-Frédéric (PeuFeu) these Philips players (CD713/23 and maybe even the CD753, Maranz CD4000 and up) do not ouput a bit for bit copy of the info on your cd's.
Even when adjusting the volume control to 0dB (yup, the volume control scales the SPDIF output signals).

--This is very disturbing, it also means the people using these players to connect to a non-oversampling DAC, in fact, do NOT have a non-oversampling DAC in such a configuration, since the source is already scaled down !


__________________
--Rudolf Broertjes

I've had a look at some datasheets.I think you can solve the problem by changing the settings of the decoder.If it's set to 1xFs the 0.5dB attenuation will not be active.(The volumecontrol is implemented before both spdif-output and filtersection)

martijn

 

[fedde]

Re: cd723 spdif

--This is very disturbing, it also means the people using these players to connect to a non-oversampling DAC, in fact, do NOT have a non-oversampling DAC in such a configuration, since the source is already scaled down !

The scaling down has nothing to do with (non-)oversampling. It could obscure some detail and increase the distortion, but will not have the effects of a digital filter. (eg. overshoot)

Fedde

 

[fons de boeck]

Re: Re: cd723 spdif

The scaling down has nothing to do with (non-)oversampling. It could obscure some detail and increase the distortion, but will not have the effects of a digital filter. (eg. overshoot)

Fedde

fedde
You are so right, PvW had the same answer...

fons

 

[martijn]

To Fedde & Fons

Hi,

your missing the point,I assume.
Rudolf's posting made me aware of Peufeu's website where you can find some measurements.The way these decoders work in 4Fs mode is probably damn ugly.I've been spending the better part of last night reading up on the subject and without fully understanding all the complexities involved in properly implementing a digital volumecontrol, I dare to say that you would be smart to circumvent these stages alltogether.

Martijn

 

[martijn]

And apparently it can be done.

Martijn

 

[fedde]

Martijn, I think you mix up two issues. One is the scaling problem, the other the 4fs oversampling in the decoder. The oversampling is only an issue if you want to use I2S. The S/P-DIF signal is not oversampled. By rewriting the controller eeprom, the oversampling can be disabled for I2S.

Fedde

 

[martijn]

Fedde,

not mixing up!
The moment you put this bloody chip into 4Fs it will scale down its spdif output!
At least that's what I understood reading the sheets.

Martijn.

BTW could not reach you about your 204 ,the email link on your website doesn't work somehow??

 

[fedde]

But do you think that in 4fs mode the S/P-DIF signal is also oversampled/digitally filtered? I do not think so...

The mail adresses on my webpages are correct. Otherwise send me a personal mail via Diyaudio!

Ciao,

Fedde

 

[martijn]

Fedde,

no,the volumecontrol is located before both filtersection and spdifsection.The volumecontrol always runs in 1Fs.As does the spdifsection.

Martijn

 

[fons de boeck]

Mea Culpa, Mea Maxima Culpa,

fons,

Boy's

it's all about the PvWDAC


fons

 

[martijn]

fons, you're right

I should have started a new thread,sorry.

Martijn

 

[WTS]

Hi; This all sounds very interesting OS vs Non OS. I have question, how do you seperate the L/R channel signals. Because this is normally done by the dig filter isn't it. Is there a schematic of one I could look at to see how this is done.
Thanks

 

[rfbrw]

Hi; This all sounds very interesting OS vs Non OS. I have question, how do you seperate the L/R channel signals. Because this is normally done by the dig filter isn't it. Is there a schematic of one I could look at to see how this is done.
Thanks

If the interchannel delay is of no concern to you then this circuit should do. I say should as I haven't built it because the delay does bother me.
The LRCLK is delayed in order to align the MSB of the 16bit data with that of the 20bit input register of the PCM63 and LRCLK to one channel is inverted. Serial data is sent to both channels.
The circuit is intended to work with the YM3623 or mode 5 of the CS8412.