Looking again at post 99 the mirror around Q9, 10, 11, 12 is kind of redundant. The mirror that does the bal-unbal conversion is already a current source. Can be improved though.
Remove the base-collector short from Q17 and put in on Q23. Put in a helper transistor instead of short between base-collector of Q19, other side the same. That mirror has higher impedance and lower distortion.
Remove the base-collector short from Q17 and put in on Q23. Put in a helper transistor instead of short between base-collector of Q19, other side the same. That mirror has higher impedance and lower distortion.
The ccs (q9,10,11,12) is necessary to feed the output. i have test all the possibilities you present, this is the best.
Circuit with bc327/337 , as predicted it's even better at low input impedances, and has only 0.00001% of distortion with a 1k source at 2ma, at 7.8ma and 10k input it has 0.000021%.
It should be also good for R/2R dac. I am very pleased with this results, and the final I/V converter will be very similar to this.
Thank you all for your support, and a special thanks for Joachim, for your help in dealing with the noise issue.
I will start a prototype to test this in real life.
It should be also good for R/2R dac. I am very pleased with this results, and the final I/V converter will be very similar to this.
Thank you all for your support, and a special thanks for Joachim, for your help in dealing with the noise issue.
I will start a prototype to test this in real life.
Attachments
forgot to say that the input impedance is 2ohm can be further reduced with parallelling more bjt at the input or lowering the emitter resistances, but 2 ohm seems a low enough impedance for a current output dac.
The distortion is 0.000014% when simulated with the 6.2ma of offset at the input and 0.000017% (increase 2db in 2º harmonic ) without the offset so there is no problem in dealing with the offset of pcm1794, as i say before just increase 6.2ma in the upper current source, this results were simulated with 8ma/100k input.
The distortion is 0.000014% when simulated with the 6.2ma of offset at the input and 0.000017% (increase 2db in 2º harmonic ) without the offset so there is no problem in dealing with the offset of pcm1794, as i say before just increase 6.2ma in the upper current source, this results were simulated with 8ma/100k input.
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sorry my mistake
The distortion is 0.000014% when simulated with the 6.2ma of offset at the input and 0.000008% (increase in 2º harmonic ) without the offset
Yes the output is going to need a servo IMO, probably a filter + servoed buffer.
I don't get simulating with such ideal current source DAC i-out. The best I've heard of is the AD1862 with I think a bit over 2k ohm @ 1mA. The latest and "greatest" ESS9018 is 1/10th that, I can't imagine how the TI S-D chips would be anything but somewhere in between across its bandwidth?
The predited THD in this design is incredibly low considering that the best a common base I'V input gives is -80db thd (the first bjt on its own.) It is fascinating to imagine this can be overcome without global nfb, but I think your design must have incredibly well matched subsequent transistors, have you tried simulating by varying the BJT models Hfe a little so as to predict real world? My experience is that with open loop common base I/V no matter how much help is given to that initial BJT, just don't measure well nor sound that great (I'm being subjective).
IMHO a DAC's analog output ideally needs -90db thd+N for audible threshold, because it gets attenuated (divided) and amplified (multiplied) before the speakers. Although a little more 2H distortion than this can still sound nice. Also the noise floor character can influence the sound to a high degree.
As far as the balanced output issue, I've never seen a discrete design that gives more CMRR than it adds in 2H and 3H. IC's just completely outperform for balanced to unbalanced conversion, next are transformers, so typically it just doesn't pay to build in a discrete bal-unbal conversion in a DAC analog stage. Probably the smartest is to leave a balanced output to the poweramp where if the output is p-p one can take advantage of having both phases. Or use a good multibit DAC.
Thanks for sharing this, very interesting to see a new BJT I/V concept as the performance of most attempts just don't sound as good to me nor measure as well as a simple mosfet D1 or a passive I/V + phono-preamp type gain analog stage.
That has been my experience as well. Simulations of complementary symmetry circuitry can produce deceivingly low THD predictions, due to the device models being repeatedly identical across multiple instances of a given device. Especially if an open-loop circuit sim is showing THD levels at anything near -140dB. Randomly varying transistor hfe (even while still within device hfe spec. limits) might produce a 1000x degredation in sim'd open-loop THD for an complementary symmetry circuit.
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Well, the real world versions made by Euvl seem to live up to his simulations, though he's using jfets instead of bjt's.
http://www.diyaudio.com/forums/digi...-sen-evolution-minimalistic-iv-converter.html
I agree that simulations probably don't match the real world in many cases, but I don't have enough experience to know when the sim's are lying to me. I just use the results from the sim as a guide and hope for the best. Unfortunately, the models I'm using are macros which makes it very hard to change Hfe or any other parameters because I'd have to edit the .lib file and create a new device from that. However, I can substitute a completely different transistor in a couple of places to see what happens. I just did that and of course the distortion is worse, but the second harmonic is still down over -90dB in my particular circuit. So, thanks for the heads up on that issue.
http://www.diyaudio.com/forums/digi...-sen-evolution-minimalistic-iv-converter.html
I agree that simulations probably don't match the real world in many cases, but I don't have enough experience to know when the sim's are lying to me. I just use the results from the sim as a guide and hope for the best. Unfortunately, the models I'm using are macros which makes it very hard to change Hfe or any other parameters because I'd have to edit the .lib file and create a new device from that. However, I can substitute a completely different transistor in a couple of places to see what happens. I just did that and of course the distortion is worse, but the second harmonic is still down over -90dB in my particular circuit. So, thanks for the heads up on that issue.
An easy way to get some sense of to what degree the THD performance might be due to complementary device relative matching is to replace a few transistors with a similar deive from the model library. For example, if your orignial sim is utilizing, say Toshiba 2SC2240 small signal NPNs, substitute a few with, say 2N2222A or 2N4401 or 2N3904 and see what happens. This way, you won't have to alter parameters any of the library models.
It should also be said that a diy circuit construction project does make practical the careful hand sorting and matching of devices. The sim'd THD performance is then indeed approachable with an actual circuit, although, thermal drift may still throw THD significantly off.
An easy way to get some sense of to what degree the THD performance might be due to complementary device relative matching is to replace a few transistors with a similar device from the model library. For example, if your orignial sim is utilizing, say Toshiba 2SC2240 small signal NPNs, substitute a few of those with, maybe the 2N2222A or 2N4401 or 2N3904 and see what happens. This way, you won't have to alter parameters any of the library models.
It should also be said that a diy construction project does make practical the careful hand sorting and matching of devices. The sim'd THD performance is then indeed approachable with an actual circuit, although, thermal drift may still throw THD significantly off.
That's what I did in the sim. I replaced one 2SC2240 with a 2SC1815, and replaced a 2SA970 in a different part of the circuit with a 2SA1015.
I'm wondering if a simple DC Hfe match via multimeter is good enough, or if I should do something more sophisticated. There seems to be different opinions on the internet about that. I guess it depends on the kind of circuit the transistor is to be used in. I was thinking of building a simple common base circuit that put the transistor under test in the same current/voltage as the real circuit, drive it with a 1kHz signal, and measure the AC gain. Then match based on that.
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The offset current from the DAC-chip makes app 2V offset at the output ..but the circuit does not performance vise seem to run into trouble... In practical terms the offset needs to be addressed...could maybe be done by inserting at counter current at the input, the simple solution would be to use a transformer, but I'd rather not, they cost, and though simple, not very pure.
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