Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

Hello Ian,

I used this setting to play 44.1kHz / 16 bit wav files and encountered problem.

Pi+Volumio2 > IsolatorPi + Dop Decoder > McFIFO > McDualXO > es9018

There is no problem playing the DSD64 and DSD128 file, but when playing 44.1kHz/16bit wav file, only noises output.

The other two settings play wav file no problem:
Pi+Volumio2 > IsolatorPi + Dop Decoder > FIFO II > DualXO II > es9018
PC > USB > McFIFO > McDualXO > es9018

How to slove this problem? Sorry for my poor English.

Thanks,
kvl
 
Hello Ian,

I used this setting to play 44.1kHz / 16 bit wav files and encountered problem.

Pi+Volumio2 > IsolatorPi + Dop Decoder > McFIFO > McDualXO > es9018

There is no problem playing the DSD64 and DSD128 file, but when playing 44.1kHz/16bit wav file, only noises output.

The other two settings play wav file no problem:
Pi+Volumio2 > IsolatorPi + Dop Decoder > FIFO II > DualXO II > es9018
PC > USB > McFIFO > McDualXO > es9018

How to slove this problem? Sorry for my poor English.

Thanks,
kvl

Hi kvl,

This is the known problem of ES9018. ES9018 doesn't take 44.1KHz 16bit format. 44.1KHz 32bit has no any problem.

However Volumio forces 44.1KHz to 16bit format. I heard some of the Pi software can output 44.1KHz 32bit, but I haven't try any yet. Just hope some one has this software and fixed this issue.

Other I2S source such as USB streamer or S/PDIF receiver don't have this issue.

Regards,
Ian
 
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Well it seems a bit overwhelming figuring out what boards to get. I am making a combined preamp/DAC/Streamer/DSP unit for a 2 to 8 channel out put for multi-way active speakers. I was going to use a Soekris Dam 1021 as the DAC, raspberry Pi as the streamer, minidsp minishark as the DSP with 4 Curryman DACs, and a Tortuga preamp board.


So I need an isolator board on the I2S from the raspberry Pi, SPDIF I/O board for FIFO II, reclocking board, and I2S interface. I would like the option to switch the I2S outputs to either the Soekris Dac or the miniDSP. That appears doable with what I listed.


So it also appears that I would need to have McFIFO board and a DualXO reclocking board between the miniDSP and the Curryman DACs.


To get the analog inputs into the miniDSP I was going to use a Beis ADC kit which outputs SPDIF which I can run into the miniDSP with its SPDIF input.


I am controlling the whole thing with an Arduino. Volume control for the analog inputs and the Soekris output will be with the Tortuga LDR board. If going digital in to the MiniDSP than it will control the volume.
 
Hi kvl,

This is the known problem of ES9018. ES9018 doesn't take 44.1KHz 16bit format. 44.1KHz 32bit has no any problem.

However Volumio forces 44.1KHz to 16bit format. I heard some of the Pi software can output 44.1KHz 32bit, but I haven't try any yet. Just hope some one has this software and fixed this issue.

Other I2S source such as USB streamer or S/PDIF receiver don't have this issue.

Regards,
Ian

I'm running Volumio2 and I have this menu:

attachment.php


It looks like it's exactly what is needed to upsample everything to 24 or 32 bits.

But bear in mind that I'm running a somewhat customized version of Volumio2 (it says "System Version: 2.203") built to support the Allo DigiOne so I'm not sure that the "mainstream" builds also support this functionality.
 

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Hi kvl,

This is the known problem of ES9018. ES9018 doesn't take 44.1KHz 16bit format. 44.1KHz 32bit has no any problem.

However Volumio forces 44.1KHz to 16bit format. I heard some of the Pi software can output 44.1KHz 32bit, but I haven't try any yet. Just hope some one has this software and fixed this issue.

Other I2S source such as USB streamer or S/PDIF receiver don't have this issue.

Regards,
Ian

Hi Ian,

Interesting about ES9018 and 16/44. Didn't know that.

moOde supports wildcard sample rate setting. Only the bit depth is changed.

-Tim
 

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Hi kvl,

This is the known problem of ES9018. ES9018 doesn't take 44.1KHz 16bit format. 44.1KHz 32bit has no any problem.

However Volumio forces 44.1KHz to 16bit format. I heard some of the Pi software can output 44.1KHz 32bit, but I haven't try any yet. Just hope some one has this software and fixed this issue.

Other I2S source such as USB streamer or S/PDIF receiver don't have this issue.

Regards,
Ian

I use the other two modules (shared in Diyaudio), I can successfully play 44khz 16bits WAV files. This is because my DAC, Northstar Excelsio, which makes ESS9018 to successfully play 44khz 16bits WAV file?
 
Hi Ian,

Interesting about ES9018 and 16/44. Didn't know that.

moOde supports wildcard sample rate setting. Only the bit depth is changed.

-Tim

If you want to do upsampling, you can be more simple to modify /etc/mpd.conf. You can increase or modify the format in audio_output. The format is format <sample_rate: bits: channels>

Audio_output {
Name "snd_rpi_hifiberry_dacplus"
Type "alsa"
Device "hw: 1,0"
Auto_resample "no"
Auto_format "no"
Format "*: 32: *"
Enabled "yes"
}

https://www.systutorials.com/docs/linux/man/5-mpd.conf/
 
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Are there any recommendations for a DAC to use with Mcfifo/McXo? It doesn't have to be multichannel, but as I understand, it definitely needs u.fl inputs. Haven't found reasonamble priced option.

You could look at the Curryman DACs that miniDSP sells. Seems like it should work. They are stereo DACs, but you could run 4 in parallel They are only $40 each.
 
You could look at the Curryman DACs that miniDSP sells. Seems like it should work. They are stereo DACs, but you could run 4 in parallel They are only $40 each.
Thanks, first thought it's only good for async, but a search on the forum gave this result: http://www.diyaudio.com/forums/digital-line-level/232003-build-thread-es9023-jg-buffer-boards-betatest-28.html#post4437661
Might give it a try, if can find reasonable delivery to EU.
Thanks for the recommendation!
 
Hi guys,

Please just relax. Let me tell you the story of I develop the FIFO project.

I’m medical electronics and signal processing background. I’m also an audiophile for more than 30 years. I knew FIFO is the best solution to deal with jitter issue of digital audio system back to the time when I was in university. But I cannot be able to implement it until FPGA technologies became good enough.

The reason I decided to design an I2S FIFO by myself was that I couldn’t find any available FIFO solution for my DAC project at that time.

Before I started my FIFO project in 2011, the only FIFO implementation in ‘high-end audio’ was Mark Levinson No.3xx reference digital processor. It was a very excellent design. But I saw two issues of their approach.

1.The whole implement was still a concept of digital PLL with FIFO memory included. The input clock and output clock were not 100% independent from each other. The controller turns the VCXO in real-time to make it tracking lock to the input signal stream. With that small size FIFO memory delay, the cut-off frequency of that PLL could be low to two digits of Hz, but still cannot be 100% input jitter immunity.

2.It uses only VCXO as secondary master clock generator, cannot use any other kind of oscillator such as OCXO, TCXO and even XO. The customized VCXO is not only very expensive, but also limits the finial low jitter performance. Under the same condition, the phase noise of a VCXO is higher than OCXO or SC-cut XO because the control voltage.

However my implement is quite different. I designed more advanced algorithm to manage two clock domains and use much bigger FIFO memory to make the output MCLK completely isolated from input clock. It becomes a true FIFO with 100% jitter immunity from the input clock. My approach doesn’t have limitation on oscillator type. All kind of oscillators include XO, OCXO, and TCXO work for my FIFO solution up to 384KHz.

I’d like to say that I’m the first one who brought this concept into a real working ‘universal’ I2S FIFO and made it available for audio DIYer all over the world, as well as the multi-channel I2S/DSD FIFO. A lot of audiophiles had already benefited their digital audio sound quality from my FIFO project by now. I’m very proud of that.

Ian

Hi Ian - sorry to reply to an old note. I have been following your projects with interest for some time. I was wondering if you are familiar with Ted Smith's work on a FPLA design which is a universal DSD converter. Apparently he has designed the firmware to recognize any type of input stream.

It includes a FIFO and since it outputs DSD, he runs everything into passive filters which include Jensen output transformers, thus eliminating the need for a DAC. He is very big on jitter minimization. His design resulted in the PS Audio DirectStream products. He gives an interesting talk here.

He has other interesting YouTube videos as well.

Cheers
 
Ian,


In the mcFIFO documentation there is multichannel interface header as one of the 3 ways to input multi-channel I2S signals. What is that to be used for? Could it possibly be for a multichannel I2S switching board? I would be interested in that to switch between a USB/I2S interface and a miniSharc.


I am expressing interest in a mcFIFO and clock board for the next group buy since I missed this last one. Wasn't sure how to put myself on the waiting list.
 
Hello guys,

I have some questions about RPI+Ian's IsolatorPi+Ian's FIFO II kit in combination with PCP (piCoreplayer) 3.20 /3.21


I have build myself a new Streamer, based on R2R modules (8x) from Audio-GD, fed by DIY made Ultracapacitor power supplies. DAC is fed by I2S directly from RPI3+Ian's IsolatorPi + Ian's FIFO II kit.

In the past I used PCP 3.0x in combination with Ian's FIFO II kit connected to my DIY AK4495SEQ dac. That combo worked for me.

Now, I have build my new Streamer, and Ian's FIFO II kit keeps having it's buffer empty (Red led: Buffer Empty).

I have tried to set Ian's IsolatorPi to master as well as slave and tried all available soundcards within Squeezelite within PCP 3.20 / PCP 3.21

None of this works.

Can someone please shine a light on this since I am completely lost by now :(

Regards,
Alex
 
Hello guys,

I have some questions about RPI+Ian's IsolatorPi+Ian's FIFO II kit in combination with PCP (piCoreplayer) 3.20 /3.21


I have build myself a new Streamer, based on R2R modules (8x) from Audio-GD, fed by DIY made Ultracapacitor power supplies. DAC is fed by I2S directly from RPI3+Ian's IsolatorPi + Ian's FIFO II kit.

In the past I used PCP 3.0x in combination with Ian's FIFO II kit connected to my DIY AK4495SEQ dac. That combo worked for me.

Now, I have build my new Streamer, and Ian's FIFO II kit keeps having it's buffer empty (Red led: Buffer Empty).

I have tried to set Ian's IsolatorPi to master as well as slave and tried all available soundcards within Squeezelite within PCP 3.20 / PCP 3.21

None of this works.

Can someone please shine a light on this since I am completely lost by now :(

Regards,
Alex
I2S out of your player is good?
 
I have a couple of questions.

My first project with the reclocker definitely exceeded my expectations by FAR.

Now, other than for my HiFi set, I would like to use this in my studio as master DAC.

1) The clocks are all -OK-, but more than that, it's not. I would love to use the Clock Board as a master WordClock if possible. Is this possible? (I'm not sure if the wordclock has a different implementation than the FiFo & Clock board

2) The FiFo introduces latency, which is obvious because of how this is designed. That's all fine. Whenever I play instruments and want to monitor the performance, the delay is too much. I was wondering for monitoring purposes, to be able to skip the use of buffer and pass it straight trough.

I am planning to work with the S/PDIF IO board.
 
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Ian,


In the mcFIFO documentation there is multichannel interface header as one of the 3 ways to input multi-channel I2S signals. What is that to be used for? Could it possibly be for a multichannel I2S switching board? I would be interested in that to switch between a USB/I2S interface and a miniSharc.


I am expressing interest in a mcFIFO and clock board for the next group buy since I missed this last one. Wasn't sure how to put myself on the waiting list.

Hi wcwc,

Yes, it reserved for muti-channel interface board which I'm gonna design later on. If you can try J8 for your miniSharc but you need external switch four USB/I2S if your do it by yourself.

Regards,
Ian
 
I have a couple of questions.

My first project with the reclocker definitely exceeded my expectations by FAR.

Now, other than for my HiFi set, I would like to use this in my studio as master DAC.

1) The clocks are all -OK-, but more than that, it's not. I would love to use the Clock Board as a master WordClock if possible. Is this possible? (I'm not sure if the wordclock has a different implementation than the FiFo & Clock board

2) The FiFo introduces latency, which is obvious because of how this is designed. That's all fine. Whenever I play instruments and want to monitor the performance, the delay is too much. I was wondering for monitoring purposes, to be able to skip the use of buffer and pass it straight trough.

I am planning to work with the S/PDIF IO board.

Hi Gitaarwerk,

It is possible. I don't know what's the frequency of the word clock, you can use one of the u.fl output if it equal to LRCK.

If all system sync with word clock, you can set it to very short delay that should be no difference with bypass.

Regards,
Ian
 
Hello guys,

I have some questions about RPI+Ian's IsolatorPi+Ian's FIFO II kit in combination with PCP (piCoreplayer) 3.20 /3.21


I have build myself a new Streamer, based on R2R modules (8x) from Audio-GD, fed by DIY made Ultracapacitor power supplies. DAC is fed by I2S directly from RPI3+Ian's IsolatorPi + Ian's FIFO II kit.

In the past I used PCP 3.0x in combination with Ian's FIFO II kit connected to my DIY AK4495SEQ dac. That combo worked for me.

Now, I have build my new Streamer, and Ian's FIFO II kit keeps having it's buffer empty (Red led: Buffer Empty).

I have tried to set Ian's IsolatorPi to master as well as slave and tried all available soundcards within Squeezelite within PCP 3.20 / PCP 3.21

None of this works.

Can someone please shine a light on this since I am completely lost by now :(

Regards,
Alex

Hi Alex,

I know you fixed this issue. I believe it was I2S source or power supply.

Can you post some information about it so that other community members can share your experience?

Regards,
Ian
 
Hi Ian,

Very nice job! Sadly I see only know your work. I had a similar idea some years ago (~2012) and I started to build a prototype but I've never had the time to finish it.
My idea was to build a VCXO oscillator with a TI CDCE913 chip and implementing a digital software "PLL" with and initial quite high bandwidth to align the input clock stream and then slow down or even completely stopping the regulation loop.
I was planning to use one of the (at this time)new PIC32MX microcontroller with two I2S ports and doing the FIFO in software by using all the available ram of the microcontroller. BTW did you ever thought to use a cheaper microcontroller instead of an CPLD?