Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

I have the DIYinHK multi-channel USB to I2S converter. So I can send in 8 channels from my computer, so I have SCK, LRCK, and 4 Data lines. If I send the SCK, LRCK, and D1 to a minishark and generate 4 additional data lines. So I could connect the SCK, LRCK, and D1-D4 from the minishark and the D2-D4 from the USB to I2S converter to the header on the mcFIFO. Is that the proper way to connect the signal wires?


If I have 3 Soekris Dam-1021 boards and a DIYinHK Es9016 8 channel DAC, I guess I could process all the 14 channels of I2S signals from McDualXO. Would there be issues using dissimilar DACs? What would the issues be?


Has anyone tried the McFIFO/McDualXO combo with multiple Soekris Dam-1021 DACs? Was there an improvement?
 
Can the S/PDIF Interface Board for FIFO II be used with the McFifo instead of the FIFO II? I know it doesn't have a direct connection for at J10 on the board, but can the board be used without the J10 header by supplying power to the board?


Probably not. I believe SPDIF Interface baord are I2C controlled by FIFO II. The input selection won't work if J10 are not connected.
 
Does the Clock Board II work without FIFO as well ?

Hi,


I have a doubt about the Clock Board II and need some help please :


Is it possible to feed the IanCanada Clock board II without FIFO board but instead from the I2S of the Pi Isolator or a direct RPI I2S signals ?
(Without slavering the source by a forth wire coming from the IanCanada Clock board II ?)


Can it works without FIFO that way and the Clock board II be a slave of a RPI while reclocking its I2S for the dac after ?
 
Thank you Dimdim for this input.


That's what I think but without understand what could hapen without this FIFO :


- Clock Board seems to be a reclocker : so reclock what it is seing at its I2S input....
- but may not get rid of the previous jitter (first domain clock : the streamer, i.e. here the PLL clock speed of the RPI)! so just swap the clock with its better phase noise xtal but keeping the delay offset from the previous clock domain ?


The concept I don't understand is how are doing the other async reclocker one can see on all the other boards (Amanero, Wave I/O, asf): most of the time USB to I2S boards ? They have no FIFO but they do reclock having xtals on boards ?????


So, why not the Cloack board could not work like that (so with more jitter without the good FIFO but at least makes its reclocking job ?


It should be good to have IanCanada inputs about that...


regards :)
 
Other boards (like USB to I2S converters) that do reclocking do it with the same MCLK that is also used to clock the USB receivers (and in turn, the PC / RPi / whatever). So there is one clock domain, since the same MCLK drives both the USB receiver (XMOS / Atmel / Cmedia / whatever) and the flip-flops.

Without a single clock domain your reclocker's flip-flops will work OK most of the time, but every x microseconds (or seconds) signals will lose enough sync to cause corruption in the audio stream. This will happen to all I2S signal lines and it will be audible, especially in test tones.

Btw, neither Amanero's Combo384 or WaveIO do reclocking at their output. JLsounds' I2SoverUSB board does.
 
thanks again Dimdim,


I understand better what is involved now with these details you give.


Never knew the JLSounds was so different than the others USB to I2S boards !


Did you hear a difference yourself between such boards : noticable enough ?


Indeed, people are saying anyone sounds the same ! but never find a proper benchmark to sort them out !


Anyway, as I have no FIFO for my new dac I will try this way : RPI 3 - Ian Pi Isolator the Clock board II then I2S input dac ! I am going to compare with and without the Clock Board II ! But for the moment even with FIFO, the RPI does make a bad job against the WAVE I/O USB to I2S as feeding a whole FIFO/isolator/Clock board !


Differences still occur before the FIFO to be hearable at the end... but it stays a good usefull board.
 
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Thanks Ian for great products.
I hope it’s the right thread to ask for help with my McFIFO and McDualXO. Until recently, I’ve been using them successfully with Curryman DAC (ES9023). Now McFIFO cant get a lock and McDualXO D1/D2 LED’s keep flashing when playing audio. No sound comes out. I measured voltages and on board XO REG (U13) OUT voltage is only 1.15v. I believe it should be 3.3v, what should I do next?
 
Thanks Ian for great products.
I hope it’s the right thread to ask for help with my McFIFO and McDualXO. Until recently, I’ve been using them successfully with Curryman DAC (ES9023). Now McFIFO cant get a lock and McDualXO D1/D2 LED’s keep flashing when playing audio. No sound comes out. I measured voltages and on board XO REG (U13) OUT voltage is only 1.15v. I believe it should be 3.3v, what should I do next?

Hi ,

No worry.

1. Measure output voltage of U13 with both XO1 and XO2 removed;
2. If it is still low, measure the input voltage of U13.

Regards,
Ian
 
Thanks Ian for prompt feedback. Here are the U13 IN & OUT with different power sources and clocks:
Code:
reg clocks + fifo power (J18)	5,08	1,17
NO clocks + fifo power (J18)	5,16	1,19
NO clocks + SilentSwitcher 	5,47	1,22
reg clocks + SilentSwitcher 	5,53	1,23
CCHD-957 + SilentSwitcher	5,56	1,24
Anything we can conclude from this?

Hi ,

No worry.

1. Measure output voltage of U13 with both XO1 and XO2 removed;
2. If it is still low, measure the input voltage of U13.

Regards,
Ian
 
Danke :)
 

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Hi,


WHat is the Bclk speed at the output of the IanCanada Clock board with normal speed and the PCM board with full speed (not halfed) please ?


For a 44.1/16 material is it 44.1 K Hz x 16 (bits) x 2 (stereo channels) : 1.4112 M Hz ???


Need it to choose a divider for DEM feeding on a TDA1541A dac !


help much appreciated,


regards


H.