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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
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Old 15th January 2013, 06:59 PM   #2121
analog_sa is offline analog_sa  Europe
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Quote:
Originally Posted by qusp View Post
there is no copper on the corners of the clock underside, just center it as best you can
On one of my oscillators there is - the ground plane on the bottom is peeking through the side. The copper is directly above the pad and i can see it touching without too much imagination. I'll probably try to squeeze a thin layer of mica in between.
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Old 15th January 2013, 07:06 PM   #2122
qusp is offline qusp  Australia
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only custom NDK XO $$$

Quote:
Originally Posted by analog_sa
On one of my oscillators there is - the ground plane on the bottom is peeking through the side. The copper is directly above the pad and i can see it touching without too much imagination. I'll probably try to squeeze a thin layer of mica in between.
sounds like a plan, or maybe make it so those pins on the adapter dont come all the way to level with the top of the PCB and fill the resulting depression and surround with epoxy

Last edited by qusp; 15th January 2013 at 07:09 PM.
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Old 15th January 2013, 07:50 PM   #2123
analog_sa is offline analog_sa  Europe
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Great idea, i knew it was worth asking
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Old 16th January 2013, 01:35 AM   #2124
iancanada is offline iancanada  Canada
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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Quote:
Originally Posted by regal View Post
This is a valid question/issue. I feel like I've been beating a dead horse in both threads but a true high class transport needs a 16 bit I2S, ie 32fs, the original standard I2S, not the hack standard phillips came up with for 24-32 bit I2s.
regal,

It makes sense if your mean feed TDA1541 with 32*Fs I2S is better than 64*Fs I2S. I can see the low 16 bits are meaningless for it and only generate more noise to noise floor. But TDA1541 does accept 64*Fs I2S, as well as original Philips I2S protocol which natively supports both 32 and 64*Fs.

That's why I design the I2S to PCM daughter board with stopping clock mode as one of the main function for NOS DACs, which feeds clock to DAC with exactly the numbers it needs and keeps clock line low for the whole rest of time to make noise floor as low as possible.

Regards,

Ian
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Old 17th January 2013, 02:22 AM   #2125
iancanada is offline iancanada  Canada
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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Default Universal I2S/DSD isolator for Amanero and other I2S/DSD sources

I have a WaveIO USB. But I’m not happy with the 2.5ns jitter problem on I2S output caused by XMOS, though it’s no longer an issue working with my FIFO. So, I bought another USB, the Amanero. But I did use it until today because there was not an isolator comes with it. I like PC music, but the PC ground.

I realized a universal I2S/DSD isolator is a must for I2S/DSD sources like Amanero and others. It took me a couple of weeks for prototyping. Now you can see it .

This isolator is nothing special, easier than the FIFO isolator because it just uni-direction not bi-direction. Four isolated signals including MCLK, SCK, WS/DSD1, SD/DSD2. PH2.0 and optional u.fl connectors are available for I2D/DSD signals. MCLK is in u.fl only. Two independent bypassble onboard LDOs for both input and output with LED power good indicator. I attached the schematics.

Almost all kind of 5 channel 16-SOIC-W and 16-SOIC-N isolators are working for this small board, including IL715E, IL715-3E, Si8440BB-D, Si8440BB-D-IS1 and others. 16-SOIC-N on top, or 16-SOIC-W on bottom.

It works perfectly with my Anabero, right away without any hesitation. I’ll try the DSD later on.

Ian
Attached Images
File Type: png UniversialIsolatorSch.png (119.5 KB, 931 views)
File Type: png UniversialIsolatorPCB.png (71.0 KB, 915 views)
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File Type: jpg IMG_0142.JPG (183.9 KB, 898 views)
File Type: jpg IMG_0121.JPG (202.6 KB, 887 views)
File Type: jpg IMG_0127.JPG (233.1 KB, 495 views)
File Type: jpg IMG_0114.JPG (261.5 KB, 451 views)
File Type: jpg IMG_0137.JPG (198.5 KB, 459 views)
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Old 17th January 2013, 02:25 AM   #2126
MisterRogers is offline MisterRogers  United States
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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Very nice Ian! I have a couple of these receivers - let me know if you have 1 or two protos to spare. :-)
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Old 17th January 2013, 02:55 AM   #2127
qusp is offline qusp  Australia
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nice job Ian, as usual, but a tiny bit late =) Acko has already designed one made specifically for Amanero, plugs right in on pinheader rather neatly.

except your prototype is ready of course
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Old 17th January 2013, 03:12 AM   #2128
iancanada is offline iancanada  Canada
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Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter
Quote:
Originally Posted by qusp View Post
nice job Ian, as usual, but a tiny bit late =) Acko has already designed one made specifically for Amanero, plugs right in on pinheader rather neatly.

except your prototype is ready of course
Very nice design, I should know it earlier

Ian
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Old 17th January 2013, 03:44 AM   #2129
qusp is offline qusp  Australia
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well to be fair on you, he only posted it on the weekend...and is already nearing 100 pieces!
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Old 17th January 2013, 06:15 AM   #2130
Popolvár is offline Popolvár  Slovakia
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Ian,

Will you include the I2S/USB isolator in GBIV? I prefer your version of the board. Could it be connected to the I2S backdoor?

Daniel
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