Nice idea Avro Arrow!
Now, I'm still (slowly) working on a design that'll interface to SPDIF board and DAC(s) for a 'FIFO controller'. Would it be even neater to use a 'silence detection' which is available on ESS DAC chips or in the FIFO and use a small relay to connect the sensing circuit shown to J4 on Ian's passive battery monitor PCB (in parallel with the output on J5/J3) only while the DAC is silenced. This way the output can be input to the controller to automatically turn the batteries off if you're not looking at the LED or don't notice it (I'm sure we've all fallen asleep listening to music before!)
I'll draw a picture/schematic up over the next week or so to show what I have planned for the rest of that controller board/design.
Now, I'm still (slowly) working on a design that'll interface to SPDIF board and DAC(s) for a 'FIFO controller'. Would it be even neater to use a 'silence detection' which is available on ESS DAC chips or in the FIFO and use a small relay to connect the sensing circuit shown to J4 on Ian's passive battery monitor PCB (in parallel with the output on J5/J3) only while the DAC is silenced. This way the output can be input to the controller to automatically turn the batteries off if you're not looking at the LED or don't notice it (I'm sure we've all fallen asleep listening to music before!)
I'll draw a picture/schematic up over the next week or so to show what I have planned for the rest of that controller board/design.
PTH or SMD? I have gerbers for both versions.
@ Avro Arrow
Is there a source with a small pcb for this circuit?
I have a couple of protos (SMD version) of the Avro's passive voltage indicator board - part of a larger battery system we've been slowly working on. I could spare a couple (2). PM me, first come first serve. PCB's free, you pay shipping. Ian, there's one with your name on it if you want - shipping's on me.
I would not trust what happens at low battery, or low power in general with ESS, especially if running synchronous clock, partial locks/unlocks, fluctuating charge, batteries going low, the ldo cutting off, then the battery spontaneously regains enough to go just over the threshold, then back off again. sorry thats simply not good enough when everything else is powered. you will possibly kill the parts with brownout
Real captured Si570 control protocol data
Hi hochopeper, Hi bigpandahk,
Here are real captured Si570 communication protocol data from a logic analyzer (with serial protocol analyzer plug-in) and a PC com port. Hope they help for your software R&D.
This communication happened when Fs switched from 88.2KHz to 96KHz. Just listen from Si570, external controller didn’t take any control.
The first on is the full communication timing captured by a logic analyzer. Please note the time interval between sending events, by comparing with the protocol source code from the user’s manual, you can figure out where is the control window and how to display and control it.
The following ones are data readings of each events translated from Txd waveform by the protocol analyzing plug-in of the logic analyzer.
The finial one is what a PC com port listened form Si570. They are exactly as same as what you can see from the logic analyzer. The setting was 9600,N,8,1
Let me know if you have any question.
Good luck to your software.
Ian
Hi hochopeper, Hi bigpandahk,
Here are real captured Si570 communication protocol data from a logic analyzer (with serial protocol analyzer plug-in) and a PC com port. Hope they help for your software R&D.
This communication happened when Fs switched from 88.2KHz to 96KHz. Just listen from Si570, external controller didn’t take any control.
The first on is the full communication timing captured by a logic analyzer. Please note the time interval between sending events, by comparing with the protocol source code from the user’s manual, you can figure out where is the control window and how to display and control it.
The following ones are data readings of each events translated from Txd waveform by the protocol analyzing plug-in of the logic analyzer.
The finial one is what a PC com port listened form Si570. They are exactly as same as what you can see from the logic analyzer. The setting was 9600,N,8,1
Let me know if you have any question.
Good luck to your software.
Ian
Attachments
After several weeks listening both with and without isolator. I setup with options:
1 - Amanero - Acko Isolator U1 - FIFO - Ian Isolator - Double Dual Clock - Buffalo IIISE.
2 - Amanero - FIFO - Ian Isolator - Double Dual Clock - Buffalo IIISE.
3 - Amanero - Acko Isolator U1 - FIFO - Double Dual Clock - Buffalo IIISE.
4 - Amanero - FIFO - Double Dual Clock - Buffalo IIISE.
Listen on my system, the sound has big difference between with and without isolator but I like the sound no isolator ( option 4), the sound is more natural.
1 - Amanero - Acko Isolator U1 - FIFO - Ian Isolator - Double Dual Clock - Buffalo IIISE.
2 - Amanero - FIFO - Ian Isolator - Double Dual Clock - Buffalo IIISE.
3 - Amanero - Acko Isolator U1 - FIFO - Double Dual Clock - Buffalo IIISE.
4 - Amanero - FIFO - Double Dual Clock - Buffalo IIISE.
Listen on my system, the sound has big difference between with and without isolator but I like the sound no isolator ( option 4), the sound is more natural.
Hi bigpandahk,
1. The first thing you have to make sure is that your PC serial port is working at 3.3V LVTTL logic level. If it was from RS232 level, it will not work with it. You have to convert it into LVTTL, otherwise, you may get your board damaged. I use a USB to serial port adaptor which comes with LVTTL logic level originally.
2. The connections have to be: Txd(Si570) to Rxd(PC), Rxd(Si570) to Txd(PC), GND(Si570)to GND(PC). If you just want to listen to Si570 for now, I suggest you leave Rxd of Si570 board unconnected first. An isolator is highly recommended.
3. Hyper Terminal was not design for this application. The software I use was from our TFT drive supplier to debug their KIT. You can find a lot of this kind of serial port debugging tools from internet. But you have to meke sure they are safe enough. You can try this free tool from its offical website first: Comm Echo - Serial Port Debug software
Good luck
Ian
Hello,
At first I'm sorry for not very good English, but I would like to share the results of my tests with Si570 board. My current setup is : Spdif board-> FIFO -> Isolator board -> Si570board -> Buffallo III SE with Legato and Tridents. Iam using Salas SSLV's for Buffalo, Legato, and spdif board. And using my own version of Salas reg bith as pre-reg and as local reg for clock board.
After many tests, I was able to achieve IMHO a significant improvement in sound, due to changes in the configuration of power Si570 board. After changes , sound became more dynamic, natural, with more sounstage, and details.
1. I replaced the TPS LDO board with shunt reg. based on Salas SSLV with low Vth nmos ( IRF 3708) and some other changes. It's stable with 0.5uF
decopling cap, so that I could try using only decoupling film caps here without any ele or MLCC.
-After change the sound od Si570 board is still very dependent on the type of decoupling film cap on shunt reg, but is a lot better than with any MLCC (X7R,X5R,NPO) or electrolytic (alu and polymer )- tested em with both TPS and shunt reg configuration.
- PET and PEN decoupling caps give sound significantly worse than polypropylenne or PPS
- PPS ( 5x100nF AVX ), give very very huge sounstage after 2-3 days break, very dynamics and clear sound but is a bit "plastic" - needs more break in ?
- most musical so far is WIMA FKP3 ( 5x 100nF ), didnt try Vishay MKP1837 yet
2. Removed sequentally all MLCC 1206 decoupling caps from Si570 board. The more MLCC caps removed - the better sound with shunt reg and film decopling caps. I didn't replace removed MLCC caps with pps so far , will try it later. I have two pieces of Ian Si570. After several days of listening to the modified version, I replaced it with an original Si board for a direct comparison. The sound has become so ugly, so quickly returned to my setup.
I found that polymer SMD caps ( using Panasonic 56uF / 9mohm ESR ) in Salas regs give better results than Nichicon Muse in my setup.
I am a bit surprised at the results, it seems that even in digital domain , more important for reclocking is the accuracy of the decoupling caps in local reg, than the its inductance. I dont why that is ( feedback quality in error amp in local reg due to low DA and no piezo efect or so ? ) I'm curious if anyone else tried a similar way and what were his impressions.
There is my setup and Si570 local reg schematic. It works with BC550/BC560 too.
At first I'm sorry for not very good English, but I would like to share the results of my tests with Si570 board. My current setup is : Spdif board-> FIFO -> Isolator board -> Si570board -> Buffallo III SE with Legato and Tridents. Iam using Salas SSLV's for Buffalo, Legato, and spdif board. And using my own version of Salas reg bith as pre-reg and as local reg for clock board.
After many tests, I was able to achieve IMHO a significant improvement in sound, due to changes in the configuration of power Si570 board. After changes , sound became more dynamic, natural, with more sounstage, and details.
1. I replaced the TPS LDO board with shunt reg. based on Salas SSLV with low Vth nmos ( IRF 3708) and some other changes. It's stable with 0.5uF
decopling cap, so that I could try using only decoupling film caps here without any ele or MLCC.
-After change the sound od Si570 board is still very dependent on the type of decoupling film cap on shunt reg, but is a lot better than with any MLCC (X7R,X5R,NPO) or electrolytic (alu and polymer )- tested em with both TPS and shunt reg configuration.
- PET and PEN decoupling caps give sound significantly worse than polypropylenne or PPS
- PPS ( 5x100nF AVX ), give very very huge sounstage after 2-3 days break, very dynamics and clear sound but is a bit "plastic" - needs more break in ?
- most musical so far is WIMA FKP3 ( 5x 100nF ), didnt try Vishay MKP1837 yet
2. Removed sequentally all MLCC 1206 decoupling caps from Si570 board. The more MLCC caps removed - the better sound with shunt reg and film decopling caps. I didn't replace removed MLCC caps with pps so far , will try it later. I have two pieces of Ian Si570. After several days of listening to the modified version, I replaced it with an original Si board for a direct comparison. The sound has become so ugly, so quickly returned to my setup.
I found that polymer SMD caps ( using Panasonic 56uF / 9mohm ESR ) in Salas regs give better results than Nichicon Muse in my setup.
I am a bit surprised at the results, it seems that even in digital domain , more important for reclocking is the accuracy of the decoupling caps in local reg, than the its inductance. I dont why that is ( feedback quality in error amp in local reg due to low DA and no piezo efect or so ? ) I'm curious if anyone else tried a similar way and what were his impressions.
There is my setup and Si570 local reg schematic. It works with BC550/BC560 too.
Attachments
do you have any actual evidence of improvement aside from subjective sighted tests and handwaving? shunts instead of tps is cool for the supplies, shunts can be excellent for low noise and low impedance. Using pretty and highly inductive film caps instead of the local SMD decoupling caps will result in more HF ripple, RFI and EMI making it into the circuit and those surrounding it, with higher phase noise; thats a fact. this arrangement simply cannot physically effectively deal with frequencies up into the high MHz range, they will become an aerial. so maybe you like higher phase noise?
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Thanks zapio for sharing your experiences with us, and thank your for your effort. I'm very interested in a closing picture of your mod Si570 board, is there any possible you post some?
Have you every try to replace the 1uF CNR (C10) on the TPS7A4700 LDO board with a film capacitor? I did some test last week and the result was quite amazing.
I'm looking forward to your good news.
Regards,
Ian
Hello Ian,
I've never tried to change the CNR cap. Only I tried various combinations of decoupling caps on both the regulators and the Si board. I have not found significant differences in sound between TPS board and shunt regulator when I used the same type of decoupling capacitors. The first significant improvement was achieved by using high-quality film capacitors only, the second after the removal of some of the MLCC's from clock board.
I've never tried to change the CNR cap. Only I tried various combinations of decoupling caps on both the regulators and the Si board. I have not found significant differences in sound between TPS board and shunt regulator when I used the same type of decoupling capacitors. The first significant improvement was achieved by using high-quality film capacitors only, the second after the removal of some of the MLCC's from clock board.
The most important phase noise in digital to analog conversion is that close to the carrier, 10 Hz offset and below. As you move away from the carrier the phase noise has less impact on the sound. Phase noise at 1 MHz offset does not affect the sound, and whatever oscillator is quiet at such offset.
With a clock really good, below 1 Hz, the sound change totally: 3-D aspect increases dramatically, the sound stage becomes more real, bass is controlled and not mushy, highs becomes natural, harsh, and strident sensations disappear.
Below 1 Hz offset from the carrier, the phase noise is dominated (crystal quality aside) by the flicker noise, so quiet active devices and ultra low noise (1/f noise)/low impedance power supply are essential.
With a clock really good, below 1 Hz, the sound change totally: 3-D aspect increases dramatically, the sound stage becomes more real, bass is controlled and not mushy, highs becomes natural, harsh, and strident sensations disappear.
Below 1 Hz offset from the carrier, the phase noise is dominated (crystal quality aside) by the flicker noise, so quiet active devices and ultra low noise (1/f noise)/low impedance power supply are essential.