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Old 28th February 2008, 07:35 PM   #121
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All systems go now. Thanks Dustin.

Dan
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Old 28th February 2008, 07:36 PM   #122
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Quote:
Originally posted by Spartacus
All systems go now. Thanks Dustin.

Dan

Good to hear

Dustin
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Old 28th February 2008, 07:55 PM   #123
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Hi Dustin,

Thanks for you answers so far.

A couple questions:

1) When is a reset required?

2) Can the chip change input formats on the fly? Say from PCM to SPDIF or DSD? If so is a reset required?

Thanks!
Russ
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Old 28th February 2008, 08:07 PM   #124
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One more question, I am thinking I should leave XO(pin 23) open (NC) when using an oscillator for clock input?

Thanks!
Russ
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Old 28th February 2008, 08:46 PM   #125
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Quote:
Originally posted by Russ White
Hi Dustin,

Thanks for you answers so far.

A couple questions:

1) When is a reset required?

2) Can the chip change input formats on the fly? Say from PCM to SPDIF or DSD? If so is a reset required?

Thanks!
Russ

Quote:
Originally posted by Russ White
One more question, I am thinking I should leave XO(pin 23) open (NC) when using an oscillator for clock input?

Thanks!
Russ


1. reset is not really required at all. You can do a chip reset if it somehow get into a wierd state (im speculating) but I've never seen the need for it yet.



2. Yes chip can change on the fly. I would mute the dac's, then change the source, then unmute for a nice smooth transition

3. Yes you can leave XO floating when connecting to an OSC
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Old 29th February 2008, 12:55 PM   #126
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Hi Dustin,

If I use an external clock source for the ES9008 DAC, does the clock frequency have an effect on the performance of the DAC?

The datasheet says the external clock must be >192 x Fs, so for a 44.1KHz input, I'd need a clock of at least 8.4672MHz.

The reason I ask is the phase noise of clock oscillators degrades with increasing frequency. If you compare a 10MHz and a 20MHz oscillator from the same device family, same manufacturer, the 10MHz has noticably lower phase noise than the 20Mhz, by up to 10dB! (See this datasheet for example)

http://www.rakon-europe.co.uk/pdf/cfpt-5300.pdf

So if the ES9008 is flexible with its master clock, would I be correct in saying the best performance would be from choosing the lowest possible external clock?

Was thinking 10MHz as this is *the* standard oscillator frequency, available off the shelf for all types of oscillators, right from the cheeziest 40c TTL oscillator, right up to several $100 OCXOs

thanks,

Len.
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Old 29th February 2008, 05:10 PM   #127
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Quote:
Originally posted by len_scanlan
Hi Dustin,

If I use an external clock source for the ES9008 DAC, does the clock frequency have an effect on the performance of the DAC?

The datasheet says the external clock must be >192 x Fs, so for a 44.1KHz input, I'd need a clock of at least 8.4672MHz.

The reason I ask is the phase noise of clock oscillators degrades with increasing frequency. If you compare a 10MHz and a 20MHz oscillator from the same device family, same manufacturer, the 10MHz has noticably lower phase noise than the 20Mhz, by up to 10dB! (See this datasheet for example)

http://www.rakon-europe.co.uk/pdf/cfpt-5300.pdf

So if the ES9008 is flexible with its master clock, would I be correct in saying the best performance would be from choosing the lowest possible external clock?

Was thinking 10MHz as this is *the* standard oscillator frequency, available off the shelf for all types of oscillators, right from the cheeziest 40c TTL oscillator, right up to several $100 OCXOs

thanks,

Len.


Hi Len,

We hanven't notived any significant difference between ocsillator frequencies. My prefference would be to use a fast one over a slower one simply becuase it pushes the quantization noise further out of band. I know I might get flamed over this one in this forum, but everyone needs an opinion.

Thanks

Dustin
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Old 29th February 2008, 08:07 PM   #128
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Default Does this look sane?

Hi Dustin, Here is my schematic for the DAC PCB.

I have decided to do the controller off board or to utilize my existing "uber controller' board.

But I think it will work great as the default mode is PCM/I2S and I have modules already that output I2S.

The board is for stereo output only.

I/V filtering is done on another PCB which will stack with this one.

Will post PCB pics in a while.

Does the schematic look ok?


Cheers!
Russ
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File Type: pdf schem.pdf (17.0 KB, 728 views)
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Old 29th February 2008, 08:13 PM   #129
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Default PCB top (preliminary)

top
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Old 29th February 2008, 08:15 PM   #130
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Default PCB bottom(prelimary)

The cap in the center of the DAC chip bypasses VDD(1.2V) for the chip. It forms a star point.
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