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Old 27th October 2008, 06:06 PM   #1
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Default Single supply bridge UcD, referencing the signals

First of all, hi to all of you !

After months of reading this classD forum I finally decided to take a shot at classD, and I settled on full-bridge UcD topology. I know, bridged UcD is not material for beginners in switching technology, but I'd still like to make one.

I plan to use Intersil's HIP4081 as gate driver and Texas Instruments TL3016 fast complementary output comparator as modulator.
Please look at first pdf

I drawed a schematic, but after looking at it carefully I realise it won't work because I have no reference for the output signal because my whole amplifier is single supply. I don't want to change the schematic to split supply, I like the idea of having only one supply rail for output stage.


Could I just use ac coupled BJT differential pair on input of the amplifier to reference the output signal to Vdd/2 ?
I read somewhere on this forum that bases of differential pair would self-bias at Vdd/2 when AC coupled ?!
Input to the modulator would then be taken from low value collector resistors of the differential pair so I don't exceed input voltage on TL3016 comparator which is powered from 5V.
look at the second pdf (in reply)

Also, I drawed RC snubbers in parallel with each output mosfet and put values of 10R and 100pF which I found in Philips UcD application note. Now i wonder if the values are right because they make highpass filter with -3dB at 159MHz. Their amplifier is switching at 400kHz. I thought the values are to be set to eat spikes and switching noise that is pretty lower in spectrum. I plan to switch at 250kHz for better efficiency and think that snubbers would have to be set to filter-out frequencies even as low as 1MHz. Is my thinking wrong ?
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Old 27th October 2008, 06:07 PM   #2
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Modified schematic
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File Type: pdf ucd2.pdf (23.1 KB, 823 views)
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Old 27th October 2008, 06:19 PM   #3
Eva is offline Eva  Spain
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Default Re: Single supply bridge UcD, referencing the signals

Quote:
Originally posted by Cro maniac

Also, I drawed RC snubbers in parallel with each output mosfet and put values of 10R and 100pF which I found in Philips UcD application note. Now i wonder if the values are right because they make highpass filter with -3dB at 159MHz. Their amplifier is switching at 400kHz. I thought the values are to be set to eat spikes and switching noise that is pretty lower in spectrum. I plan to switch at 250kHz for better efficiency and think that snubbers would have to be set to filter-out frequencies even as low as 1MHz. Is my thinking wrong ?
Completely.

These snubbers are intended to introduce a resistive impedance in parallel with the reactive components from MOSFET internal capacitance and package inductance, which tend to resonate above 50Mhz. Furthermore, they are not RC but RLC snubbers, their layout-dependent parasitic inductance counts too...

There should not be any ringing problems below 50Mhz, unless the supply layout and decouping is poor.
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Old 27th October 2008, 07:01 PM   #4
Pafi is offline Pafi  Hungary
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Quote:
I drawed a schematic, but after looking at it carefully I realise it won't work because...
...because you attached high inputs to 12 V instead of the outputs of comparator. Otherwise it could work.

The first one was better. (With a pair of input buffer, or simply with pull-down resistors on inputs, and coupling capacitors.)
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Old 28th October 2008, 07:21 PM   #5
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Eva, thanks for the reply, you opened new window for me .

Pafi, the datasheet of the HIP4081 says this:

ALI:
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected
externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin
8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V
(no greater than VDD).


HIP 4081 provides the opportunity to control all four mosfets independently. By connecting AHI and BHI to 12V i just let the dead time set on the HIP take care of switching procedure.

Quote:
The first one was better. (With a pair of input buffer, or simply with pull-down resistors on inputs, and coupling capacitors.)
Pafi, you mean I should put pulldown resistors directly on inputs of the comparator and AC couple the input resistors to preamp ? What will my common voltage reference be then ?

My greatest concern is that I have no half supply voltage reference for the outputs so I think I'll have very large offset on the output.
In dual supply amps one input of the comparator is grounded and that is reference voltage for the outputs to swing around. In my case the ground is the most negative voltage in the amp so outputs will try to work around that voltage (not good).
I thought I could buffer input signals with those two transistors i drawed in second schematic and provide reference for the output.
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Old 28th October 2008, 09:11 PM   #6
Pafi is offline Pafi  Hungary
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Cro maniac!

Oops, you must be right, I didn't read the datasheet.

Quote:
you mean I should put pulldown resistors directly on inputs of the comparator and AC couple the input resistors to preamp ?
Yes, for example.

Quote:
What will my common voltage reference be then ?
Nothing! It is not needed, since only the differential input controls the comparator. The only thing you have to take care about is that the inputs of the comparator should be in the normal working region.

In other words: the two input signals are the references for each other.

Quote:
In my case the ground is the most negative voltage in the amp so outputs will try to work around that voltage (not good).
No! OutA + OutB=+B, this is assured by the gate-driver, so they will work around +B/2. With no input signal the inputs of comparator are on the same average potential, so it will generate 50 % duty cycle, and everything is fine.

It must work!
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Old 28th October 2008, 10:36 PM   #7
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Thanks Pafi, you're helping me very much

The pulldown resistors will then be effectively in parallel with the input resistors seen from the inputs of the comparator, right ? So I need to change the input resistor value so that the parallel combination of input resistor and and pulldown resistor gives me the value I had in the first case ?!
Can then the two resistors be replaced with only one input resistor that is placed between feedback and ground ?


Ok, so i just need balanced signal for feeding this amp that is not larger than Vin max (TL3016) - Vdd / Av

Quote:
It must work!
I like that
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File Type: pdf modulator.pdf (11.0 KB, 651 views)
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Old 1st November 2008, 08:42 AM   #8
Pafi is offline Pafi  Hungary
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Quote:
Originally posted by Cro maniac
Thanks Pafi, you're helping me very much
You're welcome!

Quote:
The pulldown resistors will then be effectively in parallel with the input resistors seen from the inputs of the comparator, right ? So I need to change the input resistor value so that the parallel combination of input resistor and and pulldown resistor gives me the value I had in the first case ?!
Not neccessarily. Depending on the original values, this maybe doesn't alter the feedback significantly. But originally I wanted to suggest that you should put the pulldown resistor to where now is the input. This way you don't have to recalculate anything, except for input impedance.

Quote:
Can then the two resistors be replaced with only one input resistor that is placed between feedback and ground ?
No. Then where would you connect the input signal?

Quote:
Ok, so i just need balanced signal for feeding this amp that is not larger than Vin max (TL3016) - Vdd / Av
No, input signal is not important in this context. Calculate simply DC idle voltages!
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Old 3rd November 2008, 07:19 AM   #9
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The version with the input differential amp will also work, if you use a better current source than the one you show in the schematic. I use one of the new matched dual PNP transistors from NXP for the diff-amp (PMP5501G, which is in a very small SM package) in my very similar design, with the current source set at 3mA. This gives me a very low output dc offset, which is critical in my design as I am driving a 100V step-up transformer with a very low primary dc resistance. (To drive ceiling PA speakers.)

I've not checked the phasing of your feedback paths. Double check this,as I got my first prototype PCBs wrong on this as I hadn't checked the design properly!
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Old 3rd November 2008, 10:16 AM   #10
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Using differential IN and differential OUT comparator, i dont think there is any difficulty in that.
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