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Old 20th January 2013, 12:27 AM   #2611
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Thanks Mr. Marsh, Mr. Lee, and Frank! I'll look at the AD797 datasheet. Ray
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Old 20th January 2013, 12:53 AM   #2612
RNMarsh is offline RNMarsh  United States
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Fas42 --- in your question, 'Nearby' is a clue... distance between source and receptor will easily reduce the emi problem.... But the subject of high Z source introducing the possibility of emi/rfi pickup is a real world issue. And, so to reduce the susceptibility without affecting the audio signal is the designers challenge. What are your (all) best solutions/practices?

Thx-RNMarsh

Last edited by RNMarsh; 20th January 2013 at 12:57 AM.
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Old 20th January 2013, 12:52 PM   #2613
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"What are your (all) best solutions/practices?" R.N. Marsh
Keeping the distance between preamp and power amp short but the output impedance of this preamp is very low. I would assume lower the the two 5 ohm emitter resistors of the output pair of transistors but I'm not sure as to exact value. Then the other practice is to transformer couple the output for twisted pair shielded balanced lines with a 1:1 ratio well made tranny. I have mono block power amps, one at each speaker with a minimum of speaker cable. I would like my preamp volume control in front of me at my coffee table in front of my lazy boy chair with the CD player, turntable which is at least 18 feet from my speakers. The other alternative is some sort of balanced, unity gain output buffer that is close to a infinitely low balanced output impedance, but that means another STAGE of analog active circuitry. The other alternative is for me to get off my behind every time I want to change a CD or turn up or turn down the volume. Life is full of tough choices. But I'm open to suggestion. Thanks, Ray
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Old 20th January 2013, 02:02 PM   #2614
deanoUK is offline deanoUK  United Kingdom
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Originally Posted by fas42 View Post
There's a lovely snippet in the 'bible', H & H: opamp closed loop impedance rises with frequency, say 10 to 100 ohms at 1Mhz. Nearby, digital circuitry is slewing at 0.5V/ns. We want an error coupling of less than 0.1mV to appear in the analogue.

What does the capacitance between those two signals have to be below to achieve that? 0.02pF, something everyone here I'm sure will know how to maintain ...

Frank
Where can I find a copy of the "bible" ?
(Hotel rooms are no good.)

Last edited by deanoUK; 20th January 2013 at 02:02 PM. Reason: typo
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Old 20th January 2013, 02:46 PM   #2615
bcarso is offline bcarso  United States
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Originally Posted by deanoUK View Post
Where can I find a copy of the "bible" ?
(Hotel rooms are no good.)
I believe the book to which we are referred there is Horowitz and Hill, The Art of Electronics.

There are enough copies around now that I wouldn't be surprised to find one in a hotel room, placed by the Gideons.
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Old 20th January 2013, 03:45 PM   #2616
deanoUK is offline deanoUK  United Kingdom
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Originally Posted by bcarso View Post
I believe the book to which we are referred there is Horowitz and Hill, The Art of Electronics.

There are enough copies around now that I wouldn't be surprised to find one in a hotel room, placed by the Gideons.
Found one (in the lobby) .Thanks.
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Old 20th January 2013, 08:16 PM   #2617
benb is offline benb  United States
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You made me look, I've seen Hill's posts on Usenet for many years, and from this, the indications are the long-awaited Third Edition may be only a year away:
The Art of Electronics - Wikipedia, the free encyclopedia
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Old 24th January 2013, 06:46 PM   #2618
RNMarsh is offline RNMarsh  United States
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First one to offer SW-OPA pcb and/or BOM/parts gets my by order. Thx-RNMarsh
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Old 24th January 2013, 07:45 PM   #2619
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At the risk of sounding obsessive, it would be nice to have a FINAL agreed on parts list and a FINAL schematic without the mark overs, or is it probably too early? Is the design considered frozen? My schematic and parts list is gleaned from a number of posts. My board is thru hole. Ray
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Old 25th January 2013, 09:44 AM   #2620
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Default Proposed Implementation: Comments Requested

The attached files describe one possible implementation of the SW-OPA topology. They include a "clean" schematic, printed wiring board (PWB) layout, and parts list with suggested sources and current (Jan 2013) cost data. I would appreciate helpful comments on the design, PWB layout, and documentation.

(Yeah, I'd like to have the benefits of a "design review". That's when engineers get together to present a design, evaluate it against its requirements, and suggest improvements. Here, for example, you see engineers advocating for different design approaches: Fury of the French in Antwerp - Ferdinand de Braekeleer - State Hermitage Museum Unofficial .)

1. Design Goals. I wanted to create a flexible, reproducible, and documented reference implementation of the SW-OPA design. It should:
- Use commercial components readily available to hobbyists in small quantities.
- Have a parts cost consistent with the performance goals of this "Discrete Opamp Open Design" discussion thread. (This ain't a cost competitor for the uA741, but it should still have a reasonably high fiscal WAF.)
- Be reproducible by DIY builders with a minimum of specialized tools or test equipment.
- Offer flexibility for experimentation, component substitution, and value changes.
- Be suitable for use as a semi-pro or commercial component in a larger system.

2. Circuit Design. The schematic diagram is mainly based on Post #2409 and Post #2593 in this thread. Component designations have been changed to create sequential reference designators. Note the following design features:
- The input stage includes a balance adjustment potentiometer (R27). In a traditional opamp architecture this would probably be labeled as "offset adjustment". In this circuit it is more likely to be used as a "THD trim" adjustment - though the settings for offset null, and minimum THD, are likely to be close to each other.
-- Is this potentiometer connected correctly in the circuit to perform this function?
-- Is it realistic to even have a potentiometer in the input stage? While the pot can be omitted from a build (and the associated source resistor values adjusted accordingly), should there even be a provision to include it?
- The source resistances of Q5 and Q6 (used to set the value of the input stage's current sources) are implemented as two resistors in parallel. One value is specified, and is roughly correct for a BF862 at the high end of its specified Idss. The second resistor adjusts the current to the desired value for JFET's with lower Idss, probably by trial and error. (On some rainy Friday afternoon when there isn't much happening I may create a graph of approximate values for the second resistor, based on the current value using only the first resistor.)
- The output stage emitter resistances are also implemented as two resistors in parallel. This was done to increase the effective power dissipation, especially if the output stage is biased for operation with lower load impedances.
- Both the primary and secondary compensation networks are implemented as pole-zero (i.e., series R-C) networks as shown in Post #1568. Later refinements of the circuit used a pole-only compensation network. To create a simple pole-only compensation network, install a low value (e.g., 1 ohm) resistor or a "zerohm" jumper.
- The primary compensation node is brought out to an external connection. This may or may not be a desirable feature.
- There is provision to connect the secondary compensation networks to either side of the input differential pair. See my comments at Post #2405 et seq.
- The circuit includes the anti-latchup diode, D1.
- There is provision for on-board power supply decoupling (FB1/C4, and FB2/C5). These components can be omitted if on-board decoupling isn't desired.
- The external electrical interface consists of seven connections: inverting and non-inverting inputs; signal output; positive and negative supplies; circuit ground; and the compensation node.

3. Component Selection. As mentioned at several points in the discussion thread the component types and values in this circuit are not critical so the specific components shown on the schematic and parts list can be treated as "for reference", or "typical" choices.
- If there is evidence that a particular manufacturer's components are superior to "equivalent" parts from other manufacturers I will gladly revise the Parts List accordingly.
- The parts list shows component values for two versions of the circuit, one using a low power output stage suitable for loads of 600 ohms or greater, and the second showing values for a higher power output stage, for use with lower load impedances.
-- The actual limitations of these stages, especially thermal behavior and short-circuit tolerance haven't been determined yet.
- The transistors are all single-device packages. This was done to maintain maximum flexibility for component substitutions, since relatively few types are available in multiple-device packages.
- The selected components are surface-mount devices in 0805 or SOT23 case sizes. This was judged to be a reasonable choice for home construction.
- The specified resistors are 1% thick film parts. Going to 5% tolerance could save roughly US$1.00 in parts cost.
- The bipolar transistors are BC850 and BC860. These are long-established "workhorse" devices, readily available from several manufacturers at low cost. In simulation they show a smoother, and more extended, frequency response in this circuit . . . which may actually reflect differences of simulation model quality more than device performance.
- The compensation component values give (in simulation) larger GBW than Scott Wurcer's suggested values and actual performance may be less acceptable than with his values. Since the compensation node is readily available it should be relatively easy to increase the degree of compensation.

4. Printed Wiring Board (PWB).
- The PWB design has the greatest component density of any design I have done. Since many components are essentially placed line-on-line it may not be manufacturable using automated equipment.
- The PWB essentially follows "ten-ten" design rules: traces are at least 10 mils wide and separated from other traces and mounting pads by at least 10 mils. This is reported to be within the capabilities of home fabrication using (for example) toner-transfer techniques.
- The PWB is laid out as a two-sided design, but there are only seven traces on the bottom side. There are provisions for replacing these traces with small-gauge jumper wires, so it is reasonable for a DIY builder to fabricate the PWB as a single-sided board.
- Most of the PWB bottom side is devoted to a ground plane. This may or may not be a wise idea. There is no explicit signal or power current flowing in the ground plane - the "GND" pin is used as a star-ground point for the circuit's three ground connections. (It would certainly be an easier layout if these three connections were allowed to flow through the ground plane.)
- The PWB's electrical interface uses seven swaged-in-place contact pins. With attention to details and a little practice, a home constructor can successfully install these pins. Videos and written documents showing the process are available on the net.
- The seven external interface pins are compatible with the mechanical dimensions used by previous generations of discrete opamps including the GAP/R PP65, API 2520, and John Hardy's version of the JE-990. Six of the seven pins are electrically compatible with those opamps.
-- The "COMP" (compensation node) pin is in the position where an offset adjust pin was placed on some models. Connecting offset-adjustment circuitry to this pin will mess up the compensation and degrade performance.
- The physical size is 1.325" by 1.325". This is larger than the "standard" module size (1.125" by 1.125") of the API 2520 et al mentioned above. You may refer to this as the "Dunlop 2520 package", because it "done lops over" the API 2520 footprint on three sides.
- Some of the components are identified on the top-side silkscreen but component density prevented most of them from being labeled. The first page of the drawing (SWOPA2620PWB1_BRD.pdf) includes a component placement guide.
- I intend to post revised documentation within 24 hours, including Gerber files that may be acceptable to some PWB fabrication houses.

Dale
Attached Files
File Type: pdf SW-OPA_Post2620_Schem.pdf (125.4 KB, 180 views)
File Type: zip Post2620_Documentation.zip (460.7 KB, 85 views)
File Type: pdf SWOPA2620PWB1_BRD.pdf (95.5 KB, 108 views)
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