I may not have explained my design well enough to defend what I did, and why it will not require a redesign.
I really do not have 4 bridges in parallel. I do have 4 pwr supplies - chipamps - and load, in parallel. They are all separate. The loads are independent and therefore any one bridge does not "rob" current due to a different derating. The only point in common to each is the source node to the secondary at each bridge input. I really misrepresented my design with the use of 'parallel bridge', used on a previous thread. This is really not the case. So, I am OK. Just as an FYI, for anyone following the discussion. Thanks for all you comments.
-bg
I really do not have 4 bridges in parallel. I do have 4 pwr supplies - chipamps - and load, in parallel. They are all separate. The loads are independent and therefore any one bridge does not "rob" current due to a different derating. The only point in common to each is the source node to the secondary at each bridge input. I really misrepresented my design with the use of 'parallel bridge', used on a previous thread. This is really not the case. So, I am OK. Just as an FYI, for anyone following the discussion. Thanks for all you comments.
-bg
if it works
OK, I was the person who planted the seeds of doubt about this design.
If it works, good for you! At some point let us know how its performing. And congrats on the design- its a lot of amps, wire and power, and congrats on getting it up and running. Much more complex than the typical gainclone.
OK, I was the person who planted the seeds of doubt about this design.
If it works, good for you! At some point let us know how its performing. And congrats on the design- its a lot of amps, wire and power, and congrats on getting it up and running. Much more complex than the typical gainclone.
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