The Best DAC is no DAC

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Zoran

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Joined 2004
zorandimovski.com
koldby said:
Now I changed the Flip Flop clk to MCKL from the amanero on the 74AUCiG74 .
No measurable difference, but I think the subjective noise level was a little lower than before. The sound remain the same as with DSD clk.
Still the best sound..
Click to expand...

Yes I can say the same, sound "by ear" is somehow better, sweeter and les "digital" if I am allowed to say...
That is why I suggest to check
cheers
 
koldby

koldby

Member
Joined 2003
Zoran said:
It is not possible to recklock data with same F with clk also the same F. F at clk input to f-f have to be at least 2X higher. And same rising edge. Like Mterbekke explained with higher sample rates BCK increasing F up to 22.xxx MHz that is the same as MCK. In that case f-f just stop to operate... Approved in praxis...
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As for the type of "conversion" it is easy to determinate if it is voltage or current mode. IF it is + data present (from +Q out) and at the say serial R with another R to ground have negative voltage out (Step response going first into the negative axis...) THEN it is current converter. AND data have to be taken from the -Q to have valid phase out. (OR switch secondaries pins if XFRM used...).
IF the signal from +Q have + Step response, than it is voltage device and we have no current conversion at the R from serial R to GND. :)
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I measured this.
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(I don't remember if I post one new concept 1bit "no dac" that I made. With 3 star logic drivers after the f-f. I will post later sch and photo of the device)
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If data and clk is the same freq, the FF still works of course data is only clocked out with the timing of the clk instead of when data is changing state. The FF looks at the state of the Data input when clk goes positive and this is reflected on the Q port. I guess that the improvement in measurements is because the timing of the data changing state is not as accurate (and maybe not 50% dutycycle) as the CLK timing.

I really dont know what you are talking about when you speak of current "conversion" as opposed to voltage "conversion". You can have a current output or a voltage output. And what has it to do with the phase of the signal? Put an inverter on the data and the phase is changed 180deg.. Should this affect if it is current "conversion" or voltage "conversion" :confused:
A voltage out device can be phase inverting or not as well as a current out device. The difference between current out and voltage out is actually just a question of internal impedance. Ideally a current out device should have infinitely high impedance while a voltage out device should have infinitely low output impedance.

Looking foreward to see you schematic! Thanks
 
francolargo

francolargo

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Joined 2007
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Markw4 said:
At some point loud sound becomes deafening and is counterproductive to hearing small details, again IMHO.
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Not opinion, fact. A reflex contraction of the stapedius muscle decreases tympanic membrane excursion, effectively raising the Q of the system. The human threshold for this is in the (rather broad) range of 70-100db. Technically, the reflex is counteractive to sound actually being 'deafening' by preventing neural damage in the organ of Corti. But in my own experience, activating the reflex clearly lowers acuity and resolution.
 
koldby

koldby

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Joined 2003
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mterbekke

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Joined 2009
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Zoran

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Joined 2004
zorandimovski.com
koldby said:
I see, but what is data 1 and data 2?
I can understand you are putting the data through a FF and take the data+ and data- out fro Q and invQ from that, but data 1 and data 2? Used to be L and R but then you are making a L+R signal on OUT+ and - ??
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Data1 and Data2 are the same "-" is for inverted Data bus.
(For Single Ended use branch mark with +output)
this is only "output" stage, without analog filtering. C1 and C2 are some starting values. With "Riv" adjust the output level to interstage transformer. I used in this plate Beyer Dynamics 1:1 cant remember wich model?
 
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gentlevoice

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Hi ...

One thing that I want to share from the personal experience. Ground bounce or signal integrity is from importance. It can be simplified like adding R between the digital circuits. AND decouple addition to standard 100nF with addition of 10nF + 1nf. Every connection line have to be "trimmed" to eliminate ringing at the edges. Put the scope to 100MHz range and et the trimmer of say 470ohm value which is showing good edges replace with dmd R direct to output pin of the IC. (It could be not small for instance in shift register with HC164 in my sdiskrete I2S dad it is 220-240 ohm). And it depends of many other things so it should be done individually for each pcb or IC...
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Please pardon me if this is discussed elsewhere as I just happened to look at this post ... But ringing in the transmission trace from a digital IC can be reduced to virtually nothing by impedance matching trace + sending resistor. A program helping calculate this may be "Saturn PCB toolkit" - available free for download:

http://www.saturnpcb.com/pcb_toolkit/

... the "conductor impedance" tap gives the trace impedance which should then ideally match the sending impedance (IC output impedance + sending resistor), although I personally add a bit of resistance to make sure there is no overshoot.

Cheers,

Jesper
 
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gentlevoice

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@xx3stksm:

Pcm1792 can playback DSD if you have software converter(Rpi) or a hardware one from PCM to DSD. My solution is to use my DAC output because it has internal PCM to DSD converter(1bit DSM) in FPGA. A small PCB at the upper left(attached pic) is my DIYed pcm1792 board for comparison. I have now finished modification to my DIYed pcm1792 board to make it capable in PCM mode. The result was a little bit surprising. My DIYed pcm1792 in PCM mode has almost the same numbers as those in DSD mode(DSM conversion is done by my AD9717DAC as in pic).

CD-S2000(pioneer), which uses two pcm1794s(hardware configuration version of pcm1792) in PCM mode, is far inferior to my DIYed one if the input is bandlimited real music file at post #2004. Standard 1kHz sine can't uncover the difference. I'm not sure how much the difference in real music measurement affects SQ. But CD-S2000 has way worse THD+N in the real situation though both have the same DAC chip.

I guess this comes from poor physical implementation. CD-S2000 isn't multi-layer PCB while mine is 4-layer. My experience tells mixed signal circuit must have a solid ground plane. But I haven't found an objective result in the audio application why multi-layer is mandatory(nobody uses two-layer in video application). This can be one evidence. Another measurement data by real music has interesting results. I will open a new thread about this when I have finished a relative comparison.
Click to expand...

Hi again & thanks for your feedback. My apology for not having given any feedback until now but I have been a bit low on energy lately (a spring cold of all things) ... Also, I won't say much more for now - I am still contemplating all this information about PCM & DSM options and what may be the best solution.

Cheers,

Jesper
 
Z

Zoran

Member
Joined 2004
zorandimovski.com
gentlevoice said:
Hi ...



Please pardon me if this is discussed elsewhere as I just happened to look at this post ... But ringing in the transmission trace from a digital IC can be reduced to virtually nothing by impedance matching trace + sending resistor. A program helping calculate this may be "Saturn PCB toolkit" - available free for download:

http://www.saturnpcb.com/pcb_toolkit/

... the "conductor impedance" tap gives the trace impedance which should then ideally match the sending impedance (IC output impedance + sending resistor), although I personally add a bit of resistance to make sure there is no overshoot.

Cheers,


Jesper
Click to expand...
Yes, but it is better to "trim" against the real measurements. For every out-in trace. In this case it is only a few taps... In praxis these values are typically higher. gravitating about 120-150 in some cases 220 ohms.
I am not sure 100%, for my opinion it improves a sound result. in every digital circuit. And it worth to spend a time on that. When planning the PCB just put blank dmd R at the line. After trim each for right value against the scope. :)
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(I did the test plates with point to point links. Want to use no-soldering method but it is hard to obtain special sockets with longer legs)
 
Z

Zoran

Member
Joined 2004
zorandimovski.com
koldby said:
That makes sense. Thanks
Click to expand...

It is not on the sch, 2 f-f are before, in serial. I think HC74. PRE and CLR are at the +V, data of the first f-f is DATA, CLK for every f-f is MCK, from +Q of first f-f to DATA on the second f-f. +Q and -Q inverted data from second f-f are outputs for "conversion".
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Main role for this "mirrored" topology is to equalize R in output mosfet circuits. Only one of 2 halts per period are working.
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I put the DATA at booth enable inputs, but it is maybe a good idea to use just one enable input while other can be used for disabling the stages. Maybe I did that I will check and post.
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(Sorry for explained in words my old comps are a mess and I could not able to draw a sch for what I am talking about...)
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