speaker dc offset question

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
I wasn't very happy with reports on the performance for the power supply so I used this cap multiplier instead (courtesy of Kinnja) given in this thread:
...snip
Which, with respect, is complicating a beautifully simple circuit that essentially works. :)

An externally hosted image should be here but it was not working when we last tested it.


4700uF on the speaker is a typical choice, which Michael Creek used in his amps. Well actually 3300uF in most. There does seem to be a case for the power supply capacitor being much bigger, I think we'll agree. So 4700 uF (low ESR or whatever) on the supply leaps out at me on 15 ohms load, without making it too complicated.

A smaller input capacitor filter is kinda obvious too, though the volume pot complicates that. That 33uF decoupling on the DC operating point is a tougher one to analyse.
 
Personally I would want to experiment with that 4m7F output cap. Just doubling it up is easy to turn ON/OFF to hear the effect.
The the PSU I would go straight to 10mF and again experiment with upto 22mF as smoothing. 35V 22mF is not expensive in the basic grades. It's when one selects special parameter values that price rockets.
Almost finally, having determined what is needed in the PSU and Output, I would do the fine tuning at the input DC blocker reducing first to 100nF and trying 47nF and a few others around that value.

Finally I would revisit the Output cap/s and find out if the inaudible effect can be obtained with smaller values now that the input has acceptable passband filtering.
 
................ For maximum power transfer IIRC, source and load should have the same impedance,.................

In an audio amp we rarely want maximum power transfer, but efficient power transfer.
Maximum power transfer generally only applies when the available power is severely limited, eg. the power drawn from the sky when your radio aerial picks up a signal you want to receive.
I this situation when <1uW is available one needs to get as much of that into the receiver for good noise performance.

When you are using SS amplifiers, irrespective of whether they are source equipment, or pre-amplifiers or power amplifiers, they all generally have a low output impedance. Even Valve/Tube amplifiers have a transformer to lower the output impedance.

If you wanted and your amplifier was designed for maximum power transfer, then you would choose a speaker with the same impedance as the amplifier's output impedance.

Let's start with an amplifier that has 10Vac and 100Aac available at it's output and the Damping Factor into 8r0 is 100.

Attach an 8r0 load. The output impedance is 8r0/100 = 0r08
The 8r0 load sees 8r/[8r+0r8] of that output voltage. ~ 9.90099Vac
Power delivered to the 8r0 load is ~ 9.901^2/8r0 = ~12.25W
Reduce the load to 4r0. The delivered power is ~24.03W Note that it has not quite doubled.
Into 2r0: 46.23W
Into 1r0: 85.73W
Into 0r5: 148.6W
Into 0r2: 255.1W
Into 0r1: 308.6W
Into 0r05: 295.9W
Why has that gone done when all the rest show a rising trend?

Hang on a moment, those have been ignoring that 100Aac output limit.
On checking I can see that:
two conditions arising.
1.) the output current limit of 100Aac has not yet been exceeded. 10Vac through the Rout + Rload of 0r13 results in ~76.9Aac around the circuit.
2.) the output impedance is now bigger than the load impedance.
Maximal Power Transfer occurs when the output load impedance equals the source impedance.
Select the Rload value to be 0r08.
The power delivered is 312.5W

Now let's compare the other method.
Let's increase the output impedance to match the load impedance. I jump straight to the final value with Rs= 8r0 and Rload=8r0.
The power delivered to the 8r0 load is 3.125W when the output impedance has been increased to 8r0.
 
Last edited:
OK, I think I'm starting to understand (maybe)! This is all very new to me. First, ignoring the PS (baby steps...)

(1) The output RC circuit acts as a high pass filter since the output is effectively taken across the load resistor. As AndrewT calculated, the time constant of the output RC is 15 * 4710uF = 0.07s, so the cutoff frequency is 1 / (2*π*0.07) = 2.27Hz i.e. frequencies below 2.27Hz will be blocked at the output.

(2) The input RC circuit also acts as a high pass filter with the output taken across the 1M resistor, so it has a time constant of 1M * 0.47uF = 0.47s and there cutoff frequency of 1 / (2*π*0.47) = 0.33Hz i.e. frequencies below 0.33Hz will be blocked at the input.

Good practice would be to have the output RC time constant > input RC constant i.e. input RC cutoff frequency > output RC cutoff frequency, meaning that higher frequencies should be blocked at the input than the output. This is not the case so far (ignoring the PS for the moment), since 0.33Hz < 2.27Hz i.e. high frequencies are blocked at the output as opposed to at the input.

Is this right so far?

Also, in this analysis, in the input RC circuit the 1K resistor and 47K pot are ignored. Why is this?
 
Yes, quite right so far.

You can't ignore the input RC circuit and the 1K resistor and 47K pot, maybe just hope they don't make much difference. When you try to add common mode rejection (which is noise pickup from earth essentially) into the recipe, you've actually gotta be very precise.

Here's the two circuits we are talking about in the original design, so we are all singing from the same songsheet:

An externally hosted image should be here but it was not working when we last tested it.


An externally hosted image should be here but it was not working when we last tested it.


That power supply is a 3rd order low pass filter of sorts. You'd also need to know the load to get a feel for how much it is damped and how stable it is.
 
Last edited:
(2) is correct.

(1) is inaccurate.
The frequency predicted by the model is the F-3dB frequency.
The output of the filter will have attenuated the "turn over" or rolloff frequency by 3dB (~70% of the passband level) compared to the passband.
The single pole passive filter will continue to increase the attenuation at a rate of 20dB/decade (=6dB/octave) below the F-3dB frequency. (well that's an approximation as well, but it will do meantime).
And the "blocked" in (2) should be replaced by attenuated.

The side leg that is effectively in parallel to the 1M cannot pass DC current. As far as DC current flows are concerned it's as if it didn't exist.
Post47 correctly draws attention to some of the, what I consider to be, much more complicated issues.
I am not much good at AC circuit theory.
 
Last edited:
Calculating the output rolloff is complicated by the relatively high output impedance. The R you use in the RC calculation is the sum of loudspeaker resistance (at the relevant frequency) and the output resistance (15R in parallel with the FET drain impedance). This pushes the rolloff down a little.

The 1K is so small compared with 1M that you can ignore it. The 47k pot will have a maximum source impedance of 47k/4, assuming that the signal source has low output impedance. You should use 1M+47k/4, but as this only makes about 1% difference you can ignore it too.
 
Last edited:
The 1K is so small compared with 1M that you can ignore it. The 47k pot will have a maximum source impedance of 47k/4, assuming that the signal source has low output impedance. You should use 1M+47k/4, but as this only makes about 1% difference you can ignore it too.

I understand that since 1K is three orders of magnitude less than 1M it's reasonable to ignore it, but where does the 4 come from in 47K/4?
 
(2) is correct.

(1) is inaccurate.
The frequency predicted by the model is the F-3dB frequency.
The output of the filter will have attenuated the "turn over" or rolloff frequency by 3dB (~70% of the passband level) compared to the passband.
The single pole passive filter will continue to increase the attenuation at a rate of 20dB/decade (=6dB/octave) below the F-3dB frequency. (well that's an approximation as well, but it will do meantime).
And the "blocked" in (2) should be replaced by attenuated.

The side leg that is effectively in parallel to the 1M cannot pass DC current. As far as DC current flows are concerned it's as if it didn't exist.
Post47 correctly draws attention to some of the, what I consider to be, much more complicated issues.
I am not much good at AC circuit theory.

I don't understand why you say (2) is correct but (1) is inaccurate. They both use the same model (if by model you mean equations used to calculate the cutoff frequency). OK - I now know that the cutoff frequency means the frequency at which the filter attenuates the signal to half its power, and not the frequency which the filter blocks up to. But are you saying the my value of 2.27Hz for the cutoff frequency is wrong?
 
HaHa! I didn't say that, hameay, DF96 did! But it's OK.

The 1K is so small compared with 1M that you can ignore it. The 47k pot will have a maximum source impedance of 47k/4, assuming that the signal source has low output impedance. You should use 1M+47k/4, but as this only makes about 1% difference you can ignore it too.

Are we close to predicting the optimum values yet? I like a smaller 0.07uF on the input, DF96 and AndrewT will doubtless go for something even smaller.

The power supply is really quite complicated and got me scratching my head for capacitance values, but the original design (and output RC) was optimised for a 15 ohm speaker, not 8 ohm, so that's what I'd go for in calculating.

An externally hosted image should be here but it was not working when we last tested it.


So I make the capacitance after the coil to be roughly optimised at a smaller 4,700uF. Might want to fiddle with the coil value and the first 10,000uf along speaker crossover lines though, or even loose them altogether. Quite an interesting problem actually. :)
 
I would discourage you from changing the second smoothing cap (10mF after the coil) to a lower value.
This is the PSU cap that most strongly determines the sound quality coming from the speaker.
This cap (10mF) supplies the current that the speaker demands. The only thing between the cap and the speaker is the amplifier that modulates that current flow.
There may be some advantage in removing the 100nF that is kidding on it is some type of bypass.

The earlier PSU caps are there to attenuate interference.
 
Last edited:
The output impedance of a pot is the lower part in parallel with the upper part, assuming the top is driven from a low impedance. The highest value is midway, when you have pot/2 below and pot/2 above: the result is pot/4.

So the 47K pot is like two 23.5K resistors in parallel in the input RC circuit, giving an "effective" resistance of 47K/4 before the 0.47uF cap. Fair enough.

And if the appropriate model for this type of RC circuit (series) is time constant = C * ((resistance before cap) + (resistance after cap)), then I can understand it.

Except that, why aren't the 1K and 1M resistors after the 0.47uF cap considered to be in parallel, which would give an "effective" resistance of 0.9K after the cap, and therefore a time constant of C*(11.75K + 0.9K) ...
 
You could argue that the PSU output cap is effectively in series with the amp output cap, but its a bit more complicated than that. It is actually in series with the 15R drain resistor, but also has a clamped LC network hanging off the other side. At some point you just have to measure or simulate it. Rule of thumb: in this type of simple SE circuit you need the final PSU cap to be somewhat bigger than the output cap. This is much less of an issue with a more conventional circuit with push-pull and negative feedback.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.