Hi Guys
Although Eagle has auto-routing, no one in their right mind would use it to lay out a linear circuit. Eagle is useful inasmuch as it lets you enter the schematic, create package variations for components, and "generally" makes sure the schemo and board are consistent.
It won't check some things, so you have to recheck things by turning layers off to see if things look okay - better to do the next day or so... noting is perfect.
Anyone who lays out boards - whether they did it with tape and donuts or always by computer - will have in mind a layout. It is best when the layout and schematic are both laid out similarly, assuming one know how to draw a schematic. Most of the schematics on this forum seem to be ones entered into simulators and look dreadful having never got a simulator to work properly, I can only assume that niceties like spacing components out, reversing components and locating nets so they do not run over part names/values is difficult? Your schemos are not so bad in this regard, OS.
The CM ref cascode divider for the input stage has been around at least since the '80s. Damir's buffering of it is a nice improvement. Both improve common-mode rejection unlike the ground-ref cascodes more commonly used particularly by North American designers.
Have fun
Kevin O'Connor
Although Eagle has auto-routing, no one in their right mind would use it to lay out a linear circuit. Eagle is useful inasmuch as it lets you enter the schematic, create package variations for components, and "generally" makes sure the schemo and board are consistent.
It won't check some things, so you have to recheck things by turning layers off to see if things look okay - better to do the next day or so... noting is perfect.
Anyone who lays out boards - whether they did it with tape and donuts or always by computer - will have in mind a layout. It is best when the layout and schematic are both laid out similarly, assuming one know how to draw a schematic. Most of the schematics on this forum seem to be ones entered into simulators and look dreadful having never got a simulator to work properly, I can only assume that niceties like spacing components out, reversing components and locating nets so they do not run over part names/values is difficult? Your schemos are not so bad in this regard, OS.
The CM ref cascode divider for the input stage has been around at least since the '80s. Damir's buffering of it is a nice improvement. Both improve common-mode rejection unlike the ground-ref cascodes more commonly used particularly by North American designers.
Have fun
Kevin O'Connor
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That is not my invention, it was used before by others, and Bob Corell suggested it and I used it in my TT amp. GK used it here http://www.diyaudio.com/forums/soli...-vas-current-limit-blameless.html#post1817405 but I did not know that until recently.
BR Damir
I did have this as an option for the "badger" , but no one used it.
It was the "crude form" ... Cascode referenced from LTP CCS to
rail with a resister divider.The Luxman 120a (below 1) was the reference.
Buffering the "luxman style" reference gives even more of a PSSR gain
and lower THD.
Still , I personally have not built one (with out a ground ref.)
.... so the option (OPT1) below , allows -
a standard ground reference for the zener. Also , one can use the
diode (below 2 DC6) or (OPT 2) - the transistor clamp.
....Cover my Ar$e
... even with my designs. Lots to "play with" 
PS - now for some documentation (andrewlebon really wants this IPS).
OS
Attachments
Last scheme continues to do strange square wave plots, notice it's only plotting positive to 0, and if you compare the time it takes to finish the simulation to the 1st wolverine version and this one, you quickly notice something is off...maybe it's some model definition?!
I haven't got that much experience with ltspice, but in the last weeks I've been simulating a lot of (blameless) amps, and every time I got for instance a cdom too high or too low, sim time increase exponentially showing signs of instability or oscil...
just a tought...
I haven't got that much experience with ltspice, but in the last weeks I've been simulating a lot of (blameless) amps, and every time I got for instance a cdom too high or too low, sim time increase exponentially showing signs of instability or oscil...
just a tought...
An externally hosted image should be here but it was not working when we last tested it.
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No , it's a hybrid. Sprint (computer) lets me drop pads , but to go from schema
to actual layout - no assist.
I had eagle , but it does not know about Hi-Z/lo-Z or what section is
VAS/cascode/CCS - does auto routing. I like "hands on".
OS
I use eagle, but never use auto routing for analog design.
Soon ,Andrew - I am "fine tuning" it.
Since last post , look at the changes (nothing major).
This will look nice (to match the NAD CFA
).Moved input filter closer to LTP (Q4/5).
On the schema , I will add comments on device selection and explain
the options.
PS - one circuit change ..... referenced Q3 direct from the CCS -
better current regulation at the cascode (+ 1ppm ?). LTP loaded from
R10 (1K) improves sound ??? , and allows easy calculation of CCS current.
Having the blue led in series with the zener offsets the V drop across
R10 - still a -14.5V cascode reference . R10 can be jumpered as well
for a direct LTP-CCS connection (another option).
OS
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OS, you might add a ground pad next to the NFB pad, in case someone wants to use coax for the NFB wire.
EDIT: Also, taking the LTP cascode buffer from below the 1k resistor might be a good idea, since the 1k is meant to add resistance to the CCS collector capacitance. It makes sense you would want to apply that to every collector at the CCS point. Otherwise you lose the advantage after bypassing it with another collector junction. Instead of moving the buffer base to the CCS side of the 1k resistor, you could add a resistor in series with the buffer collector, although this would be in parallel with the 1k, so a bit worse.
EDIT: Also, taking the LTP cascode buffer from below the 1k resistor might be a good idea, since the 1k is meant to add resistance to the CCS collector capacitance. It makes sense you would want to apply that to every collector at the CCS point. Otherwise you lose the advantage after bypassing it with another collector junction. Instead of moving the buffer base to the CCS side of the 1k resistor, you could add a resistor in series with the buffer collector, although this would be in parallel with the 1k, so a bit worse.
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You mean add a another 1 K to the buffer's collector (feeding the cascode)?
Whats that mean ??
PS - will add the ground pad - Good idea !
OS
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Ok, so my original way was better ? (i did that a couple hours ago).
I had (-3) more cascode volts but the current would "swing"/modulate (a tiny bit) more.
I'll show you. (below)
It was almost a "draw" between either side of R10 (1ppm ! ).
OS
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I meant the other side of the resistor. In this schematic the resistor gets bypassed by Q3's collector, which ruins the point. The purpose of the resistor is to help with leakage capacitance at the LTP emitters in the first place, so bypassing it is bad.
I had a circuit where the CCS capacitance was messing with step response, and the 1k resistor fixed that. Of course my circuit was topologically challenged by an ambitious design goal, yours may not need it so much due to high voltage across japanese collectors.
I had a circuit where the CCS capacitance was messing with step response, and the 1k resistor fixed that. Of course my circuit was topologically challenged by an ambitious design goal, yours may not need it so much due to high voltage across japanese collectors.
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Is this a comparison of CFA vs VFA or is it more about the benefits of the Cascode? - I'm looking for some opinion on the CFA vs VFA thingy ?
At the end of the day, do you feel you'll be building CFAs more often than VFA's or is there really no reason to pick one over the other because in the end it's the detailed building blocks that make the difference. Or are they just all the same when you design them this darn good !?
With a tracking cascode, 500Hfe and bias of 2mA per transistor, I've calculated that the minimum series feedback resistor (R28) at which THD will double should be about 6.5k. You use 22k, so if you could drop that to 1/3 to 1/4 you may get that big a reduction in distortion. But there is another option.
Have you tried buffering the LTP, IE using Darlingtons? The one weakness of the tracking cascode here is it doesn't improve LTP current gain. Might be able to wring a bit more distortion out out...
That assumes that there is no leakage of distortion into the feedback network from any place other than the LTP (I can't see any).
And with that, I am sleep.
Have you tried buffering the LTP, IE using Darlingtons? The one weakness of the tracking cascode here is it doesn't improve LTP current gain. Might be able to wring a bit more distortion out out...
That assumes that there is no leakage of distortion into the feedback network from any place other than the LTP (I can't see any).
And with that, I am sleep.
I try Hawskford cascode on VAS, one is VFA, and the other is CFA. Friend of mine who do not understand about electronic, prefer to my VSSA variant. He said, my VSSA variant is more airy.
THD is not everything. I sim my Hawskford VAS more superior about THD things.
It clearly notice even when I use laptop/notebook internal soundcard and mp3.
Next time, I will try amp with simple as possible, try to get highest slew rate and then trade the slew rate a bit for lower THD.
I want to know why amp can sound more "airy" than other amp.
Slew rate, pattern of harmonic distortion? Unfortunately, I do not have instruments to confirm it. If I can borrow RNMarsh's instruments.....