i dont really buy into reclocking been a fix all, its more like clocked realignment
signal integrity must be maintained at all times
on my own i've bypassed the isolators and pre-reclocked input i2s with a fifo logic chip. i didnt do it just for fun ive tested it both ways
fpga reclocking aint supposed to be that optimal anyhow
market price is determined on what u can get for it,
small quantities require a premium price
@ynmichael
Looking at the pictures of the back of your enclosure, it looks to me like your Amanero's USB port is touching your enclosure.
If that is true and assuming that your enclosure is connected to GND (a logical assumption, due to the XLR connectors), you are effectively canceling out the DAM's galvanic isolation.
I suggest making the opening for the USB port bigger and perhaps insulating the outside of the USB port's housing.
Looking at the pictures of the back of your enclosure, it looks to me like your Amanero's USB port is touching your enclosure.
If that is true and assuming that your enclosure is connected to GND (a logical assumption, due to the XLR connectors), you are effectively canceling out the DAM's galvanic isolation.
I suggest making the opening for the USB port bigger and perhaps insulating the outside of the USB port's housing.
Thanks! That’s very good observation... I made a mistake in my back panel drawing at the time I had it machined - the width and height were swapped... so I had to open up the sides manually. It should be fixed in the dwg I uploaded
Enclosure is connected to ground, made much effort to ensure electrical safety. I’ll wrap tape around USB port to fix this issue.
I bought B series XLR connectors to ground the shielding shell to the chassis, but it’s not connected to any signal grounds.
Does the bridge rectifier that I have between chassis and star ground provide galvanic isolation?... I included it based on recommendation from an amp ground design guide.
Great points... I’ll get it fixed.. plastic standoff’s are already used throughout tho
As I mentioned in my last post, I intentionally bought XLR connectors that doesn’t short the shell shield (the black chromium / white aluminum panel / metal pin in the bottom screw) to pin 1. There is an option to do so reflected by the suffix -0 or -1 I think in the Neutrix product number.
I2S WIRES - What are the best recommendations- apart from as short as possible
ynmichael:"triple wires twisted and shielded, only the three data and clock signals are connected"
Nigel: "i would have said 75mm max for i2s,
subjectively long i2s suffers a loss of clarity and definition"
Twisting each of the hot wires with a ground wire in both ends of the amanero or xmos ground and the dam1021 iso ground?
Is shielding a good idea? If so, would you shield all of them with one shield, and how would you ground that?
ynmichael:"triple wires twisted and shielded, only the three data and clock signals are connected"
Nigel: "i would have said 75mm max for i2s,
subjectively long i2s suffers a loss of clarity and definition"
Twisting each of the hot wires with a ground wire in both ends of the amanero or xmos ground and the dam1021 iso ground?
Is shielding a good idea? If so, would you shield all of them with one shield, and how would you ground that?
I2S WIRES - What are the best recommendations- apart from as short as possible
ynmichael:"triple wires twisted and shielded, only the three data and clock signals are connected"
Nigel: "i would have said 75mm max for i2s,
subjectively long i2s suffers a loss of clarity and definition"
Twisting each of the hot wires with a ground wire in both ends of the amanero or xmos ground and the dam1021 iso ground?
Is shielding a good idea? If so, would you shield all of them with one shield, and how would you ground that?
ynmichael:"triple wires twisted and shielded, only the three data and clock signals are connected"
Nigel: "i would have said 75mm max for i2s,
subjectively long i2s suffers a loss of clarity and definition"
Twisting each of the hot wires with a ground wire in both ends of the amanero or xmos ground and the dam1021 iso ground?
Is shielding a good idea? If so, would you shield all of them with one shield, and how would you ground that?
I would welcome an investigation about bit errors on I2S and also on Toslink, and for different lengths. Has it been done?
The I2S was designed to carry a clock that was to be used as conversion reference - so was s/pdif. Now, if this clock in a specific implementation is not used to drive the d/a conversion engine, only bit faults remain as a reason for sound degradation.
All these "rules" on length I suspect stem from the clock carrying days where rise times, overshoot and EMI interference on these lines actually did effect the conversion as they where causing jitter on the carried clock.
But there is no parity bits or other security on these lines so they will fail silently for bit-errors. Only to be heard as Beatles not jiving as should. But does this really happen? It's a pity that the red book disc format was not transferred on these lines - that had given them some redundancy and self healing - not to mention the ability to supervise for bit errors and lit at led to inform the music lover.
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A bit error rate experiment or a measurement/stochastic simulation of SNR would be very useful indeed. I couldn’t find any existing stats though. Also, if we’re not extracting/using clock from the I2S, we should treat it as a purely digital signal. This seems to be the hard part of diy but I would think that the I2S transfer rate is designed to be immune from noticeable bit error when transferred over distance of 20cm. It just seems ridiculous otherwise. Perhaps that’s what I should accept until I see evidence against it/start to have time to test this sort of stuff myself....
On the other hand, perhaps fpga reclocking doesn’t make it immune against clock jitter in the incoming signal, then this design is done for and we’re better off adding our own isolator and reclocker to the board. I don’t see enough evidence for such a claim though.
P.S. I agree if cd was transferred on I2S the protocol might be more robust. Well said
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Suppose that fpga reclocking works well enough for the r2r design, shouldn’t the overshoots and ringing be harmless? After all, that’s one of the main reasons of using digital signals - to be more robust against interference.
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Cat6 pairs would probably be best, use 3 pairs and ground the rest.
I never even thought that this would be a problem until someone pointed it out though so I used regular shielded cables.
If you haven’t started your build or have plenty of space in your enclosure, then just keep it really really short. If you’re like me, then it’s a sticky situation
Re-cklocking should be made with some buffering on the ingress in order to digest some jitter and maybe even wander (jitter = 1/10 of UI, larger is wander) of the incoming data.
I'm a telecom person so I use these definitions
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I think there’s 10ms of buffering here but I could be wrong. Good to see some professionals here who could work on these issues for extended period of time for good reasons.
For me, I’m way over my budgeted time for this project and even by the end of year I might have just enough to repair... EMI shielding is on the table but I’ll never be able to get it perfect for the blue pcb torioidal, will decide what to do with it later...
Will still happily keep my eyes open to find out what else I screwed up though
Maybe?... For a CS guy like me such an endeavor would be at best a very involved hobby which I’m not sure I’m prepared to have. But, IMO, it could be more of a side project for you.... idk at least for the issue of I2S BER vs cable length in a typically noisy environment in a dac enclosure, it can be