Seems most of us are still at the 'on wood' stage. Just easier to experiment, I guess. Mine is on MDF and a DC supply as well. I thought the DC an improvement over the AC feed.
Don't see your pop-fighter circuit in the photo - did you ever post the schematic?
Blinky light muting with proper delay: I been wanting to minimize this to a single active mosfet to simplify things so waiting on those. My test relay only had a single NO contact so was only useful as a concept. NO isn't ideal for a shunt so I had to order some small takamisawa dpdt signal relays. You need the relay to collapse almost immediately upon power loss and thats much easier to accomplish than having to energize a relay to avoid a poweroff amp killing surge. I don't think anyone here wants to run their audio in series with a cheapo relay.
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At around -140dB? I suspect the noise of blood flowing around your eardrums is going to be a bigger issue. Besides it's a peak in the noise floor of my sound card.
Is your circuit running in series with the signal or simply shunting it to ground 'on the light blinking'? Keep us updated when you get the bits.
Shunting to ground is the best method as Soren said doing such from the resistor ladder is perfectly fine. It's also cleaner as the relay can be placed pretty close to the DAM outputs while not having to mess with the direct path to your outputs. Normally closed contacts is pretty failsafe too, especially on powerup.
Wanted to say to those who have no used the volume control aspect of the DAM that it is benign which is wonderful.
Until implementing the VC I was using the JPlay attenuator. Only usable in six dB steps which is not very useful at all.
Taking the JPlay attenuator out of the chain and using the DAM VC is better in every way.
For those hesitant to use the VC do need to hesitate. It is probably the best place to attenuate in any system.
Until implementing the VC I was using the JPlay attenuator. Only usable in six dB steps which is not very useful at all.
Taking the JPlay attenuator out of the chain and using the DAM VC is better in every way.
For those hesitant to use the VC do need to hesitate. It is probably the best place to attenuate in any system.
..I am using my SDTRANS with BIII and ballanced SEN.....simply gorgeous.
Right now My DAM promisses a lot but i have to build decent PSU for it.
...we are just starting to see where it can go....
Member
Joined 2006
CTF: you can find the thread here - http://www.diyaudio.com/forums/digi...-sen-evolution-minimalistic-iv-converter.html
The errors are not systematic. They are more or less random in R-2R and very hard to get out unless you are willing to calibrate every bit. The big problem is that beyond a certain point, an R2R is no longer monotonic. That is, a lesser input value begins to deliver a higher output value. That should never the be the case in a converter. A converter should always be monotonic across its rated range.
Here's an interesting simulation you can do by hand:
Start with a simple 2 bit R 2R DAC, such as attached. Generate all resistors with a random uniform distribution of a given tolerance and check your manufacturing yields.
In the case of a 2-bit DAC, let's say I used resistors with +/-40% error tolerance and I "built" 1000 of them. Let's look at one that failed to deliver at least 1/2 LSB of error (in other words, it became non-monotonic)
Normally, let's say target for R = 1K and 2R = 2K. In the simulation I can see failure occurs when R1 = 1379 (31% low), R2 = 1470 (26% low), R3 = 711 (29% low) and R4 = 2622 (31% high). For b0 = 0 and b1 = 1, R1 and R2 parallel to 711, then they sum with R3 to 1422 ohms. Then, we have a divider that is formed by R4 (2622 ohms) and 1422 ohms. That gives an output voltage of 1422 / (1422 + 2622) = 0.351V. Assuming b0 and b1 are 1V or 0V, that means that instead of 0.5V with perfect resistors, we get 0.351V.
Now, the perfect values in a simple 2-bit converter are 0V, 0.25V, 0.5V and 0.75V. 1/2 LSB = 0.125V, and so 0.5V - 0.5 LSB = 0.375V. From the above example, we see the output voltage 0.351, so this simple 2-bit R 2R DAC became non-monotonic--failed to deliver the rated accuracy--with the above resistors.
Remember, too, that I "built" 1000 of these using random resistor values. In fact, 93.8% of them met spec, and the above example was one of the 62 failures that didn't meet spec.
But, with this failure rate, we can now do something kind of magic. In order to add an extra bit of resolution and keep our 94% manufacturing yield, we must halve our error. So, a 2-bit DAC with +/- 40% resistor tolerances achieved 94% yield in our virtual factory. A 3-bit DAC thus needs 20% tolerances to achieve the same. And:
4b needs 10%
5b needs 5%
6b needs 2.5%
7b needs 1.25%
8b needs 0.75%
9b needs 0.375%
10b needs 0.1875%
11b needs 0.093%
12b needs 0.046%
13b needs 0.023%
14b needs 0.011%
15b needs 0.005%
Running simulations again, with 0.01% resistors and targeting 16bit performance, out of 1000 builds with uniformly distributed 0.01% resistors, only 33.3% deliver 16-bit performance. The breakdown is as follows:
100% can deliver 12-bit performance
94.2% can deliver 14-bit performance
30.8% can deliver 16-bit performance
8.6% can deliver 18-bit performance
1.8% can deliver 20-bit performance
In other words, even with 0.01% resistors, the performance of an R 2R DAC is a crap shoot beyond a certain point. Some (1.8%) can deliver very good performance. Most will be barely able to deliver ~15 bit performance. A good 16-bit converter can deliver -110 dB THD. A good 12-bit converter will deliver about -80 dB THD. And THD is one way that monotonicity (or lack of) will manifest itself.
So, back the error correction: You can solve a 2-bit R 2R DAC in excel very easily, and generate random resistor values to see the yield rate. Then, you can try to see how to calibrate out those errors. It's hard to do, even in a 2-bit DAC.
The silicon guys will use R2R to roughly 12-13 bits or so. Then, they use gain switching to bring the converter up to 16-bit or so. See DAC8811 as an example. Note the silicon guys can deliver very good matching of resistors on die, and they have a long history of building trimming structures. But even with all that, they don't expect more than 12 or 13 bits from R2R AND they haven't come up with a novel way to calibrate out the error (due to the random nature).
PS. See this very good paper on how to deconstruct and analyze R 2R DACs.
Tutorial: Digital to Analog Conversion ? The R-2R DAC | Tektronix
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Hi TNT,
The post you link to notes 0.006% THD, and assuming dominated by harmonics (which is characteristic of R2R) that means THD+N is also 0.006%, which is -84 dB, and that means the the SINAD is -84 dB, which means effective number of bits (enob) is 14.
That agrees very well with the error contributions from the resistors that I posted above, too. Makes sense to me.
Note that a modern 12-bit DAC can achieve -85 dB THD (slightly better). See TI DAC8043, for example. That also suggests the DAC is functioning more in the 13-14 bit region. A modern sigma delta converter is sitting around THD+N of -115 dB, which is about 20 effective bits.
My point is that the error some wish to cancel is inherent in R2R. It's not a bad thing, necessarily. It may very well be what makes the sound appealing to some. But rather than trying to cancel it, just move to a more error free topology if the errors are bothersome. These are well traveled roads. There's a reason nobody makes crazy long R2R DACs in silicon anymore. That reason is that wide R2R don't do as well as sigma delta in common performance measurements such as THD and THD+N.
The post you link to notes 0.006% THD, and assuming dominated by harmonics (which is characteristic of R2R) that means THD+N is also 0.006%, which is -84 dB, and that means the the SINAD is -84 dB, which means effective number of bits (enob) is 14.
That agrees very well with the error contributions from the resistors that I posted above, too. Makes sense to me.
Note that a modern 12-bit DAC can achieve -85 dB THD (slightly better). See TI DAC8043, for example. That also suggests the DAC is functioning more in the 13-14 bit region. A modern sigma delta converter is sitting around THD+N of -115 dB, which is about 20 effective bits.
My point is that the error some wish to cancel is inherent in R2R. It's not a bad thing, necessarily. It may very well be what makes the sound appealing to some. But rather than trying to cancel it, just move to a more error free topology if the errors are bothersome. These are well traveled roads. There's a reason nobody makes crazy long R2R DACs in silicon anymore. That reason is that wide R2R don't do as well as sigma delta in common performance measurements such as THD and THD+N.
I addition to the things stated at the post linked by TNT...
I think you miss my point. I do not want to do a simultaneous correction for the whole production lot, but a individual correction for an specific DAC. The resistors of one individual DAC have no error at random, but an fixed deviation from the value they should have, so an systematic error. There is no random anywhere in sight for a individual DAC, i.e. you can calculate its ouput within the precission of your measurements.
What I need is the voltages at the DAC output with only one bit switched on, and that for every possible bit. Either you measure every resistor, or the voltage at the output of the assembled DAC. The output of an arbitrary bit state you get bey superposition, as this is a linear problem.
The "only" problem is to get these voltages, for the bits you want to correct, with the needed precision. But you can measure this with a precession beyond the precession of affordable resistors.
You only can correct some of the MSB part of bits this way as you need more LSB bits to do so.
Although not being exact, the voltages produced by the more LSB bits get smaller and thus they could be used to correct the errors of the MSB bits. You could even use the one of the opposite ladder to subtract.
The calibrating is done by switching the bits that produce the voltage next to the one that it should be.
You can not get worse than doing nothing this way. So you achieve an improvement this way.
The problem is thus you are given a voltage you want to reach and have to compute how you can approximate this (best) by the sum of some values of a fixed and given list of voltages.
An perhaps not optimal but easy algorithm to do so is to have your voltage list ordered, run top down add a voltage if the sum with what you already have does not exceed your goal.
Hello,
I need some help. Today I updated the firmware to the newer version (09), and the DAC started to sound very distorted (No matter how is the level of the music), I tried to upload the firmware several times and no luck, sounds very awful.
I uploaded the firmware with the hyperterminal, with the "download" command.
I have the "Input and switch boards for Soekris DAM1021 DAC" 1.1, no volume control (I tried the volume control but I decided pull off). Sounds bad with the Amanero or the Coax
Any idea?, faulty board?, is possible get the first firmware version?
Best Regards
I need some help. Today I updated the firmware to the newer version (09), and the DAC started to sound very distorted (No matter how is the level of the music), I tried to upload the firmware several times and no luck, sounds very awful.
I uploaded the firmware with the hyperterminal, with the "download" command.
I have the "Input and switch boards for Soekris DAM1021 DAC" 1.1, no volume control (I tried the volume control but I decided pull off). Sounds bad with the Amanero or the Coax
Any idea?, faulty board?, is possible get the first firmware version?
Best Regards
Yes, understood. I was just highlighting how the performance alone could vary across a build of 1000 units given 0.01% resistors.
Yes, but in a 16-bit converter, 1 bit is 15 ppm. The resistors likely have a 5ppm tempco, which means even a modest thermal gradient across the board limits you (still) to less than 16 bits. In fact, the bigger source of error is the drivers for each tap. Those are pmos and nmos, and those have a massive tempco themselves. As you increase from 25 to 50C, your Rds(on) of the pmos source or nmos sink increases by 25%.
If you have a 1K R, and 20 ohm pmos rds(on), as your unit increases by just a 0.25 degrees, you will already change your effective tap resistor from 2K + 20 to 2K + 20.1, which is far more than a single LSB. You can calibrate this out at a fixed temp, but then someone walks by, swirls the air and things change again. 15 ppm is very small!
So, I'd argue that no matter what you do you are really stuck at 14 or 15 bits. it is inherent to the R2R. Don't fight it! Enjoy it for what it is! That's my point! If you want crazy low distortion figures, then move to sigma delta.