the 6K is connected to both sides of the cathodyne. the output is switched between loaded and open. (which doesn't change the behavior)
source Z driving the LCR must indeed be 6K.
yes... as long as R1=R2 ?1 and ?2 can be whatever you decide them to be.
(side note. tube models for spice are easily available with lots of support.)
I'll answer your posts to the best ability I can.
dave
Dave, I was looking at your block diagram and reading your post above. When you say, "output is switched between loaded and open", there is no switch shown for this in your block diagram, right? If I'm interpreting you correctly, I agree, it doesn't change the problem, but I just want to be sure I understand.
Another thought: we’re going to have to agree on how to test the circuit. I think what you’re asking for is a circuit with the same behavior as a “model” consisting of two ground referenced voltages sources, proportional to the grid voltage and 180 degrees out of phase with one another, each in series with a 6K resistor. So disregarding the parasitics and DC voltages of the circuit under design, it had better be able to pass any simple test that this model can, right?
If you can point me to a simple procedure for importing tube models into LTspice, I’d be grateful.
Another thought: we’re going to have to agree on how to test the circuit. I think what you’re asking for is a circuit with the same behavior as a “model” consisting of two ground referenced voltages sources, proportional to the grid voltage and 180 degrees out of phase with one another, each in series with a 6K resistor. So disregarding the parasitics and DC voltages of the circuit under design, it had better be able to pass any simple test that this model can, right?
If you can point me to a simple procedure for importing tube models into LTspice, I’d be grateful.
hey chris,
the switch I was referring to is the one feeding the grid of the second tube.
As for testing. A frequency sweep of each phase will suffice. If fed from an inverse RIAA filter the proper values of resistance for ?1 and ?2 should give matched flat response with the only difference being the phase.
Stephie Bench did a couple of primers on LT spice in the stickies here
I like and use the drop down tube selection.
dave
the switch I was referring to is the one feeding the grid of the second tube.
As for testing. A frequency sweep of each phase will suffice. If fed from an inverse RIAA filter the proper values of resistance for ?1 and ?2 should give matched flat response with the only difference being the phase.
Stephie Bench did a couple of primers on LT spice in the stickies here
I like and use the drop down tube selection.
dave
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I showed in earlier posts how, given a 3 node network with node 1 being an input node (meaning it's driven from a voltage source, but it doesn't have to be just this node that's driven), and nodes 2 and 3 being output nodes, it's possible to calculate impedances which connected to nodes 2 and 3 simultaneously will reduce the voltage gain to those nodes by half. I also showed how to calculate the differential impedance between nodes 2 and 3. I further showed that in some cases, the sum of the impedances which reduce the node gains by half (we should have a name for those impedances because they are not always equal to the driving point impedances; maybe something like "half gain load impedances"), is equal to the differential impedance between the nodes--but not always. Generally speaking, if there is a transfer impedance between the nodes, they aren't equal.
The Cathodyne is a network with unusual properties. It is possible to calculate the half gain load impedances and also the differential impedance between nodes P and K. The outputs of the Cathodyne are equal and opposite in polarity. This means that if you connect an impedance if 2Z ohms between P and K, in the form of two impedances of Z ohms in series, the center node of those two impedances will exhibit a voltage of zero volts (with respect to ground) no matter what the output voltage of the Cathodyne is. Therefore, that center node may be grounded without effect on the operation of the Cathodyne. What this means is, that connecting a pair of identical impedances Z from each of plate and cathode to ground is just the same in effect as connecting a differential impedance of 2Z from P to K.
Therefore, when we speak of connecting a differential load to the Cathodyne, it is exactly the same as connecting equal loads to P and K.
SY's article in Linear Audio spoke of a "boundary condition", this condition being the requirement that when loads are connected to the Cathodyne, they are always connected to P and K at the same time and with equal values.
Note that when you connect a differential load across P and K, you automatically meet this "boundary condition". So if you simply discuss differential loading, which is the usual desired mode of operation of a Cathodyne, you get the same result as applying separate "half gain load impedances" to P and K, but without having to deal with a special "boundary condition". This is possible, because as I showed in an earlier post, for the Cathodyne, the "half gain load impedances" are equal to half the differential impedance.
If you want to think about the equal impedances (half gain load impedances) which, when connected as separate loads to P and K reduce the gain by half, simply realize this fact (that their value is half the differential impedance). This is not true for most networks, but it IS true for the Cathodyne.
It would be more in line with current network theory practice to call these "plate driving point impedance", "cathode driving point impedance" and "cathodyne differential output impedance". These terms are unambiguous.
Here's an example of the sort of language which I think leads to disagreement. Instead of saying "source impedance", one could say "driving point impedance" or "differential impedance" or even "transfer impedance" (between P and K).
The better name for this case (where the LCR RIAA loads are connected simultaneously) is "differential output impedance", and the numbers are half that impedance.
If equal loads are applied to P and K, then we have applied a differential load impedance. If a load is applied to only one of P or K, then "source impedance" is a driving point impedance. If two unequal loads are applied to P and K, how shall we treat the "source impedance"? Should we treat it as a differential impedance or a driving point impedance? Obviously not as a pure differential impedance (equivalently as equal "half gain loads").
The best thing to do is to add the loads to the admittance matrix for the Cathodyne and solve the system. This method always gives the correct answer.
Again, which "source impedance" is being referenced here? In this case we should be able to figure it out for ourselves.
The block diagram in post #759 indicates that the LCR RIAA filters are both connected to the Cathodyne at the same time. If they both have the same input (driving point) impedances, then the relevant Cathodyne impedance would be the differential impedance, because as I pointed out earlier in this post (and has been well known for some time), applying two equal loads Z to the P and K of a Cathodyne is exactly the same as applying a differential load of 2Z, and can be treated that way.
The Cathodyne is a network with unusual properties. It is possible to calculate the half gain load impedances and also the differential impedance between nodes P and K. The outputs of the Cathodyne are equal and opposite in polarity. This means that if you connect an impedance if 2Z ohms between P and K, in the form of two impedances of Z ohms in series, the center node of those two impedances will exhibit a voltage of zero volts (with respect to ground) no matter what the output voltage of the Cathodyne is. Therefore, that center node may be grounded without effect on the operation of the Cathodyne. What this means is, that connecting a pair of identical impedances Z from each of plate and cathode to ground is just the same in effect as connecting a differential impedance of 2Z from P to K.
Therefore, when we speak of connecting a differential load to the Cathodyne, it is exactly the same as connecting equal loads to P and K.
SY's article in Linear Audio spoke of a "boundary condition", this condition being the requirement that when loads are connected to the Cathodyne, they are always connected to P and K at the same time and with equal values.
Note that when you connect a differential load across P and K, you automatically meet this "boundary condition". So if you simply discuss differential loading, which is the usual desired mode of operation of a Cathodyne, you get the same result as applying separate "half gain load impedances" to P and K, but without having to deal with a special "boundary condition". This is possible, because as I showed in an earlier post, for the Cathodyne, the "half gain load impedances" are equal to half the differential impedance.
If you want to think about the equal impedances (half gain load impedances) which, when connected as separate loads to P and K reduce the gain by half, simply realize this fact (that their value is half the differential impedance). This is not true for most networks, but it IS true for the Cathodyne.
It would be more in line with current network theory practice to call these "plate driving point impedance", "cathode driving point impedance" and "cathodyne differential output impedance". These terms are unambiguous.
Here's an example of the sort of language which I think leads to disagreement. Instead of saying "source impedance", one could say "driving point impedance" or "differential impedance" or even "transfer impedance" (between P and K).
The better name for this case (where the LCR RIAA loads are connected simultaneously) is "differential output impedance", and the numbers are half that impedance.
If equal loads are applied to P and K, then we have applied a differential load impedance. If a load is applied to only one of P or K, then "source impedance" is a driving point impedance. If two unequal loads are applied to P and K, how shall we treat the "source impedance"? Should we treat it as a differential impedance or a driving point impedance? Obviously not as a pure differential impedance (equivalently as equal "half gain loads").
The best thing to do is to add the loads to the admittance matrix for the Cathodyne and solve the system. This method always gives the correct answer.
Again, which "source impedance" is being referenced here? In this case we should be able to figure it out for ourselves.
The block diagram in post #759 indicates that the LCR RIAA filters are both connected to the Cathodyne at the same time. If they both have the same input (driving point) impedances, then the relevant Cathodyne impedance would be the differential impedance, because as I pointed out earlier in this post (and has been well known for some time), applying two equal loads Z to the P and K of a Cathodyne is exactly the same as applying a differential load of 2Z, and can be treated that way.
Merlinb, in response to your post 737, I was hoping we might agree on some things:
What do you say, Merlin?
- Stuart still asserts as recently as post 727 that despite much evidence to the contrary, when P and K loads are equal, P and K impedances are too. (Please read his short post. I wouldn’t want to be accused again of misquoting him.)
- As can be confirmed by simulation, bench testing or algebra, the differential impedance seen by a load connected between the plate and cathode of a Cathodyne is a little less than 2/gm.
- As can be confirmed by simulation, bench testing or algebra, the high frequency bandwidth of each Cathodyne output is a little more than gm/(2 pi C) Hz, where C is the load to ground on both the plate and cathode.
- The differential impedance ≈2/gm and the impedance ≈1/gm that figures into the bandwidth calculations are distinct.
What do you say, Merlin?
Hey,
everyone seems to be coming together on this.
In your 1-6 Things change when you change from being interested in the plate impedance to being interested in what seems to be termed the "differential output impedance"
I have never mentioned anything other than input or output impedance. I just made the observation that the output impedance at the plate and the cathode of a cathodyne are each approximately 1/gm. (do note that I didn't say "plate impedance" and cathode impedance" are 1/gm but the output impedance is.)
don't know if this brings things closer together or starts us an another trip around the merry-go-round.
dave
everyone seems to be coming together on this.
In your 1-6 Things change when you change from being interested in the plate impedance to being interested in what seems to be termed the "differential output impedance"
I have never mentioned anything other than input or output impedance. I just made the observation that the output impedance at the plate and the cathode of a cathodyne are each approximately 1/gm. (do note that I didn't say "plate impedance" and cathode impedance" are 1/gm but the output impedance is.)
don't know if this brings things closer together or starts us an another trip around the merry-go-round.
dave
Dave, I won't hold you off any longer in my reply to your design problem. Thanks for engaging with me on my questions, although I want to be clear that we're still not done - I still want to continue with you on them. Let me finish dinner and I'll post my answer to what your boss is demnding of you.
Dave, I put together your requirements from posts 748 and 759:
However, as you can see in the simulations, to accomplish this, the values of rt and rb (your ?1 and ?2) are very different. Now, if the plate and cathode impedances were the same, you’d think rt and rb would be the same. And yet they are not. Well, maybe we just have to swap the places of rt and rb in the circuit to get the same results. Let’s try it:
Nowhere near your requirements. Well, what if we assumed that the triode/Rp/Rk part of the circuit presented a 2/gm impedance and we just had to “build out” rt = rb = 6000 – 1/gm? Let’s try that:
The cathode driven load is close, but the plate driven one is not.
I don’t see how we can escape the conclusion that the Cathodyne P and K to ground impedances are quite different.
“It is also required that the 6K LCR be driven from exactly a 6K source.”
“I also want to mention that the ideal 6K LCR is a constant impedance "T" network that provides a 6K load to the source independent of what happens behind it.”
I’m testing the circuit which meets your requirements by setting the AC grid voltage to zero and inserting a 1mA 1KHz AC current source between ground and the plate to test the total plate to ground impedance, and subsequently between the cathode and ground to test the total cathode to ground impedance. Since the LCR presents a 6Kohm constant impedance to the circuit, the resulting voltages across the current sources had better be the parallel combination of the 6K driving impedance and the 6K load, which must be 3K, and both are:
However, as you can see in the simulations, to accomplish this, the values of rt and rb (your ?1 and ?2) are very different. Now, if the plate and cathode impedances were the same, you’d think rt and rb would be the same. And yet they are not. Well, maybe we just have to swap the places of rt and rb in the circuit to get the same results. Let’s try it:
Nowhere near your requirements. Well, what if we assumed that the triode/Rp/Rk part of the circuit presented a 2/gm impedance and we just had to “build out” rt = rb = 6000 – 1/gm? Let’s try that:
The cathode driven load is close, but the plate driven one is not.
I don’t see how we can escape the conclusion that the Cathodyne P and K to ground impedances are quite different.
I think you are misinterpreting his use of the term "source impedance".
What he said was
"the source impedances at the cathode and plate of a cathodyne are equal and low"
Here he was referring to half the impedance seen between P and K, NOT the P-to-ground, or K-to ground "source impedances".
As long as the loads are balanced they may be considered to be connected in series, as a single load, directly between P and K. As a single entity they therefore see the P-K source impedance.
But newbs may find it strange or confusing to consider a circuit this way, so SY has kept the two equal loads separate, as they appear in a typical circuit diagram.
In which case, each of the two loads sees an effective source impedance of half the P-K impedance. That is the value you can use to find the bandwidth. That is the "source impedance" to which SY was referring.
Of course, if you were to consider a noise voltage developed across just one of the loads, say, then you would have to consider the P-to-ground, or K-to-ground impedance.
The trouble is that "source impedance" can be interpreted in more than one way when you're trying to express ideas by text alone! Yes, it would be easier if SY had explained this is words of one syllable right from the start, if only to get you off his back!
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