The phono amp you are talking about has a very old ancestor, namely AGI 511 designed by David Spiegel.
At the time (1975) that was state of the art, and it still will earn respect when compared to newer designs.
Googles billedresultat for http://amp8.com/tr-amp/foreign/agi/jpeg/agi553-5.jpg
Through our completed design af a DAC with discrete NFB technology, we had our experiences with op-amps. We tried out a lot of them, and it is still not possible to say excactly what goes wrong in a scientific and logical way.
To me they sound dull when they are to drive cables and inputs in preamps and so on. Some worse than others of course, but we never got the performance from op-amps we expected, and we never got near what we could achieve with a good discrete design.
If it was the op-amps themselves or the fact, that our discrete design was NFB and DC coupled, which is hardly achieveable with op-amps, we tried to disclose by using AD 744 NFB op-amp. Also this device would not perform as the discrete design.
So we gave up using op-amps, although we really wanted to try them out, since they have enormous PSRR, and most of them have data, which we never can achieve with discrete technology.
But it did not work out, so instead we had to design a discrete NFB amp with almost completely noiseless supplies, and with capabillity to drive any reasonable load.
That did the job, but at the cost of complexity, heat, price and an unreasonable large amount of possibilities for assembly failure.
To my knowledge nearly all op-amps work in Class A/B (or C). If the current consumption is 5 mA for the whole amplifier, this tells me that the amplifier will not work in Class A when the output voltage is a couple of volts and the load (including the feedback network) is a few kiloohms.
Thank you very much for your advice. I will have a closer look, but what I have seen so far, looks promising
Hmm!
Why do you want a pulse transformer at the recieving end?
IMHO it belongs in the transmitter end if at all, and they do impose jitter on the signal, due to waveform corruption and ringing.
But it is obviously a choice between bad and worse when connecting to a computer or so.
Connecting to a good transport with linear supplies though, should be no problem.
To my knowledge nearly all op-amps work in Class A/B (or C). If the current consumption is 5 mA for the whole amplifier, this tells me that the amplifier will not work in Class A when the output voltage is a couple of volts and the load (including the feedback network) is a few kiloohms.
Thank you very much for your advice. I will have a closer look, but what I have seen so far, looks promising
The definition of class-A generally is, that Iq must be larger than the output signal current.
Normally line level voltages is 2 volt. Driving a typical input of 20kohm, this will result in a signal current of 100uA. A typical op-amp have a Iq around 5mA as you mention. And that is approx 50 times more than the signal current. In other words... Op-amps do work in class-A when used in traditional line level gear.
I fully agree... If you want something real high end, you must go for a discrete design. Just like we did in our Reference DAC.
However, there are ways to tweak a op-amp based design ahead of those chinese DAC's.
The funny thing os, that people newer complain that the Benchmark or the TPA products isn't any better than the chinese DAC's. People enjoy paying big bucks for these,even though in reality, they are still just an op-amp based DAC.
The idea of this DAC is to create something similar to these DAC's, like the Benchmark and TPA, but without the fantasy price tag. The target is 199 USD including ALL electronics.
As Kurt von Kubik mention, we might add a discrete NFB buffer, which may increase performance way beyond the Benchmark, TPA and others... Still no fantasy price... Just 199 USD! And naturally 100% open source. Maybe someone from the other side, can learn a thing or two about prices on electronics
.
That one already exists :
Gigawork 24/192 Up-sampling DAC DA CONVERTER w/ USB kit - eBay (item 120474001273 end time Feb-23-10 10:08:39 PST)
Very good, better than most A branded DACs and ready made.....
USB ready, well priced..... Sorry but try to design an original DAC.
Gigawork 24/192 Up-sampling DAC DA CONVERTER w/ USB kit - eBay (item 120474001273 end time Feb-23-10 10:08:39 PST)
Very good, better than most A branded DACs and ready made.....
USB ready, well priced..... Sorry but try to design an original DAC.
Looks OK!!
We already did design an original DAC. Take a look: http://www.diyaudio.com/forums/digital-line-level/138230-dac-project-completed.html
But I guess you are right... Maybe we should do something more than these chinese DAC's... Wondering why people do not complain about the Benchmark, TPA and others, not doing enything else than the chinese DAC
Most likely, we will add a discrete NFB buffer. Else we have to redesign the whole analog stage, into a discrete NFB design. This however, will make the DIY part way more complex, which was one of the things we did not want... Hhmmm.... What to do??
Sorry for delay
All logic and analog circuitry is to be on at all times.
Sound is a lot better from well tempered electronics than cold ones
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Interesting project.
I'm working with the SRC4392at the moment so it's interesting to see parallel thought.
To me, the choice of MCLK is important and should be ultra stable to minimize jitter. It should drive the DAC and the SRC.
Could you explain your choice of 25MHz for MCLK as this is not an integer multiple of any sample rate. Have you seen an sonic advantage by invoking the SRC PLLs?
I'm working with the SRC4392at the moment so it's interesting to see parallel thought.
To me, the choice of MCLK is important and should be ultra stable to minimize jitter. It should drive the DAC and the SRC.
Could you explain your choice of 25MHz for MCLK as this is not an integer multiple of any sample rate. Have you seen an sonic advantage by invoking the SRC PLLs?
power supply
this is a pretty simple regulated +/-15v affair. includes a ground lift circuit, multiple levels of current supply and ripple suppression capacitors, isolated shielded transformer. using the specified components and proper grounding layout on the pcb, should result in excellent performance. enjoy!
this is a pretty simple regulated +/-15v affair. includes a ground lift circuit, multiple levels of current supply and ripple suppression capacitors, isolated shielded transformer. using the specified components and proper grounding layout on the pcb, should result in excellent performance. enjoy!
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I always took line level to be 1Vrms which means peaks can be 10V. Designing for impedance levels greater than 10Kohms sometimes causes noise problems.
Knutn is right. In some situations, opamps will be in class B. You have to verify each stage, as a good engineer always does
Power supply enhancements
Sine you're using so many decoupling caps, you could put them to a bit better use. For example, on the input 2700uFs, a series resistor between the first and second one will form an RC lowpass filter to suppress higher-order harmonics of the mains switching more effectively. Its value will depend on the output current - choose the biggest value which still leaves the 317/337s in regulation - 1ohm would be a good starting point.
Also, since you've included the short-circuit protection diodes for the 317/337s you can afford to go higher in value with the 10uF on the adj pin - bigger values will give slightly more ripple rejection. Try 100uF.
Sine you're using so many decoupling caps, you could put them to a bit better use. For example, on the input 2700uFs, a series resistor between the first and second one will form an RC lowpass filter to suppress higher-order harmonics of the mains switching more effectively. Its value will depend on the output current - choose the biggest value which still leaves the 317/337s in regulation - 1ohm would be a good starting point.
Also, since you've included the short-circuit protection diodes for the 317/337s you can afford to go higher in value with the 10uF on the adj pin - bigger values will give slightly more ripple rejection. Try 100uF.
Output stage queries
Having had a quick peek, I'm curious about your 5534 output stage. You've got 22k and 150pF hanging off pin5, going to ground. Is this an oversight - if you're trying to 'classA' the opamp, surely the place to connect them is the negative rail, not ground? Also, do you have a source for this suggested use of the comp pin on the 5534? I'm wondering where the idea came from....
Incidentally, the input impedances to the positive and negative sides of the diff stage aren't balanced - you'll get better common mode rejection I think if you balanced them as they're coming after a single pole passive RC (the 470/4n7s).
Having had a quick peek, I'm curious about your 5534 output stage. You've got 22k and 150pF hanging off pin5, going to ground. Is this an oversight - if you're trying to 'classA' the opamp, surely the place to connect them is the negative rail, not ground? Also, do you have a source for this suggested use of the comp pin on the 5534? I'm wondering where the idea came from....
Incidentally, the input impedances to the positive and negative sides of the diff stage aren't balanced - you'll get better common mode rejection I think if you balanced them as they're coming after a single pole passive RC (the 470/4n7s).
I always took line level to be 1Vrms which means peaks can be 10V. Designing for impedance levels greater than 10Kohms sometimes causes noise problems.
Knutn is right. In some situations, opamps will be in class B. You have to verify each stage, as a good engineer always does
Please explain to me, how 1V RMS can suddenly end up in 10V peak? When I was at the engineering college, the peak value of an was calculated as: Vpeak = Vrms*1,41
Hi Iain!
The point in upsampling is excactly that you have no relatioship between the timebase of the original signal and the up-sampled signal.
This way you can both up-sample and downsample to any frequency within the limits of the up-sampler itself.
This is the very essense of up-sampling, and I think the 25MHz clock will result in something 97KHz or so. This is chosen because sampling frequencies above ca. 100 KHz needs a µ controller and the CS4398 performs at its best @ around 100KHz.
You are quite right about the clock, in our earlier discrete designed DAC we tried both high precission discrete clocks and precission X-tal oscilators.
We found the oscilator much better than the discrete ones, wich we do not really understand, but it must be due to jitter induction. Even a LClock XOII with jitter no more than around 3 psec @ 20Hz was discarded of sonic reasons.
We ended up using the oscillator but with a very precise and noiseless PSU with 2 regulation stages.
Regarding up-sampling, the whole theory is to find in this tutorial written by a razor sharp guy, have a look yourself. http://www.diyaudio.com/forums/digital-source/28814-asynchronous-sample-rate-conversion.html
Hi Rsbonini
Thanks a lot for your input.
I have a small comment on the design of your PSU.
In my experience it is no good idea to decouple directly at the smoothing caps, IMHO it is to be done where the power is needed, and always with high quality caps, and in digital design this means low ESR @ high frequencies. For this design I´d recommend polyphenylene sulfid caps i.e. Evox SMR or like.
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