Christer,
To estimate MD it is sufficient to have good scope and square-wave oscillator. At some Russian forum boys have estimated MD and suggested bjt model wrapping this way (see left part):
http://gaydenko.com/spectrum/case03/schematics.png
To estimate MD it is sufficient to have good scope and square-wave oscillator. At some Russian forum boys have estimated MD and suggested bjt model wrapping this way (see left part):
http://gaydenko.com/spectrum/case03/schematics.png
Just use common emitter schematics, load with resistor, apply square-wave to base, adjust all values to get, say, 50mW and 250mW power dissipation at top and bottom (or vice-versa), record Ic (or voltage drop at load resistor). You will notice top and bottom curves are not straight lines. They look like exponents. Then choose model-wrapper RC constants to make a wrapper as close to your measurements as possible. Nothing mysticChrister said:
As I have said, you need good scope with sufficient resolution. To feel all these just play with referenced model wrapper.anli said:
Just use common emitter schematics, load with resistor, apply square-wave to base, adjust all values to get, say, 50mW and 250mW power dissipation at top and bottom (or vice-versa), record Ic (or voltage drop at load resistor). You will notice top and bottom curves are not straight lines. They look like exponents. Then choose model-wrapper RC constants to make a wrapper as close to your measurements as possible. Nothing mystic
Yes, I realize we can measure it indirectly by looking at Ic, and maybe that is sufficient since it is changes in Ic we are interested in anyway. We just have to rule out other causes than thermal effects for the measured deviations.
As for the method you linked to. Do I understand it correctly that the network to the lower left is intended for simulations of the thermal effects and has nothing to do with the measurements per se? Then I get what you mean by fitting the network to the measurements and using the measurements to empirically derive a thermal model.
You are right. Left-part is a complete "block" (in LTspice terms) to be used as replacement of raw bjt model. Right part is absolutely out of the context. I have uploaded LTspice files for your quick playing with them:Christer said:
http://gaydenko.com/spectrum/case03/tnpn.asc
http://gaydenko.com/spectrum/case03/tnpn.asy
Christer said:
My ugly English means something like this
Just a little note. C3,R4 (10 seconds) represent bjt case warming and was (the only) got "from head" (not by me).anli said:
You are right. Left-part is a complete "block" (in LTspice terms) to be used as replacement of raw bjt model. Right part is absolutely out of the context. I have uploaded LTspice files for your quick playing with them:
http://gaydenko.com/spectrum/case03/tnpn.asc
http://gaydenko.com/spectrum/case03/tnpn.asy
My ugly English means something like this
I first thought that the left block was a measurement setup, not a simulation setup. That is what confused med. There was absolutely nothing wrong with your english, just a thing or two you forgot to say or didn't say clear enough for my tired brain to get it.
Hello Christer,
I really appreciate your in depth explanation, being a novice I appreciate the technical explanations even though it will take some digestion to fully understand it. Sorry about the confusion on my error, I meant to write Complimentary feedback pair, but perhaps all that time I spent working with current feedback op amps in has set my brain in everything that begins with the letter C must be current . On a different note, regarding VAS stage I have removed the Beta Enhanced emmitter follower idea and implemented a single CCS vas 2sa1360 as with the CFP it required high Lag compensation to stabilize 30-47pf. With the single single transistor I can re-implement the 22pf lag and 10pf lead. even 30pf would lead to intermittent oscillation, nothing severe. so far so good.
Thanks
Colin
I really appreciate your in depth explanation, being a novice I appreciate the technical explanations even though it will take some digestion to fully understand it
. Sorry about the confusion on my error, I meant to write Complimentary feedback pair, but perhaps all that time I spent working with current feedback op amps in has set my brain in everything that begins with the letter C must be current . On a different note, regarding VAS stage I have removed the Beta Enhanced emmitter follower idea and implemented a single CCS vas 2sa1360 as with the CFP it required high Lag compensation to stabilize 30-47pf. With the single single transistor I can re-implement the 22pf lag and 10pf lead. even 30pf would lead to intermittent oscillation, nothing severe. so far so good.Thanks
Colin
Thank you Christer,
I appreciate the time you took in courteous explanation. What a difference courtesy makes......
This is relaxation for me, and I answer quickly without consulting texts. What is the name of the Vbe/Ic relationship; just the standard exponential relationship of transistor action?
BTW, I am well aware that Self et all mention CFP; but I am surprised that the clear advantage is not explored with the exception of the Halcro, which more people should examine.
Anli,
That's one helluva design you have there.......
Colin,
The Zout of the lower CFP transistr, being an emitter, is 26/mA - very low - so a beta enhancing EF with its additional phase shift is clearly not needed. Direct to the VAS is the way to go.
However, I may not have your latest mod clear, difficult with words alone. Could you please PM me with a more detailed explanation?
Cheers,
Hugh
I appreciate the time you took in courteous explanation. What a difference courtesy makes......
This is relaxation for me, and I answer quickly without consulting texts. What is the name of the Vbe/Ic relationship; just the standard exponential relationship of transistor action?
BTW, I am well aware that Self et all mention CFP; but I am surprised that the clear advantage is not explored with the exception of the Halcro, which more people should examine.
Anli,
That's one helluva design you have there.......
Colin,
The Zout of the lower CFP transistr, being an emitter, is 26/mA - very low - so a beta enhancing EF with its additional phase shift is clearly not needed. Direct to the VAS is the way to go.
However, I may not have your latest mod clear, difficult with words alone. Could you please PM me with a more detailed explanation?
Cheers,
Hugh
Hello,
I did some research on that a few years ago (someone posted links to my old site). New site : http://audio.peufeu.com
I still believe this effect to be quite important. It is largely ignored in audio, but :
The RF guys need to model it because self-heating in RF transistors changes the s-parameters according to the power envelope.
Industrial guys need to be sure the thermal inertia of their big MOSFETs will prevent them to explode from the switching power spikes.
And all the transistor curves in the datasheets are from pulsed measurements (in the us range) since self-heating really looks like early effect (or reverse early effect which doesn't exist) depending on which way you trace the curve.
Try googling "transistor self heating".
The thermal impedance from junction to outside world is a lowpass filter, ie. the very fast power change will heat and cool the die only, whereas slow power changes will be damped by the thermal inertia of the package.
Interestingly, the poles of this thermal transfer function seem to be smack in the middle of the audio band, with time constants in the ms ranges.
The prototype burnt and I never had time to rebuild it, and it was a long time ago, so I can't really help right now. Maybe later...
By the way, is there any Spice which can use these thermal models ? I heard of a new BJT model, can't remember the name, though...
I did some research on that a few years ago (someone posted links to my old site). New site : http://audio.peufeu.com
I still believe this effect to be quite important. It is largely ignored in audio, but :
The RF guys need to model it because self-heating in RF transistors changes the s-parameters according to the power envelope.
Industrial guys need to be sure the thermal inertia of their big MOSFETs will prevent them to explode from the switching power spikes.
And all the transistor curves in the datasheets are from pulsed measurements (in the us range) since self-heating really looks like early effect (or reverse early effect which doesn't exist) depending on which way you trace the curve.
Try googling "transistor self heating".
The thermal impedance from junction to outside world is a lowpass filter, ie. the very fast power change will heat and cool the die only, whereas slow power changes will be damped by the thermal inertia of the package.
Interestingly, the poles of this thermal transfer function seem to be smack in the middle of the audio band, with time constants in the ms ranges.
The prototype burnt and I never had time to rebuild it, and it was a long time ago, so I can't really help right now. Maybe later...
By the way, is there any Spice which can use these thermal models ? I heard of a new BJT model, can't remember the name, though...
I have neglected this one and moved here.AKSA said:
(drilling/screwing the amp case these days).
As for memory distortions, more clear MD-elimination is presented with cited-above phones amp schematics and here (this is a class A bridged follower I'm listening to just now):
http://gaydenko.com/um/schematics18.png
AKSA said:
maybe one of moderators could delete my previous post so that the puzzle remains unanswered... 
peufeu said:
Interesting. I would have guessed mainly low frequencies were affected. However, I did some googling and, although not finding much of interest, I did find a paper that claimed even signals up in the MHz range can be affected, and as far as I understand, the author did not mean just that the Q point changes with the envelope, but with the actual signal amplitude. It was unclear what type of device and package he referred to in the case, though. Perhaps that was about IC transistors.
Anyway, The time constans must depend a lot on the type of package and the die size. I suppose TO92 and similar would be amongst those devices most affected due to small die and bad heat transfet to the ambient.
It also struck me today that there might be a way to do, if not perfect so at least reasonably good, measurements of the effect on arbitrary signals. One could take a single die dual transistor and connect them into two identical circuits. Then feed one of them with a signal and keep the input of the other one grounded and measure how Ic and other parameters vary in this transistor while the other one is handling the real signal.
> I did some research on that a few years ago.
While I do not discount that the effect as described is real, I thought that the comparison you made in your experiments were not 100% conclusive.
In comparing an oridinary diff pair to one with cascode and then further with CFP, so many things changes as well at the same time, such as effective capacitance (bandwidth) and gain (or amount of local feedback).
I think to be really conclusive, one has to experiment with say various configurations of a cascoded CFP, but deliberately make one of which not constant power. Then and only then is the comparison really centred on thermal memory (or not).
Shame that your prototype is longer available for further investigations.
Patrick
While I do not discount that the effect as described is real, I thought that the comparison you made in your experiments were not 100% conclusive.
In comparing an oridinary diff pair to one with cascode and then further with CFP, so many things changes as well at the same time, such as effective capacitance (bandwidth) and gain (or amount of local feedback).
I think to be really conclusive, one has to experiment with say various configurations of a cascoded CFP, but deliberately make one of which not constant power. Then and only then is the comparison really centred on thermal memory (or not).
Shame that your prototype is longer available for further investigations.
Patrick
The character of thermal distorsion
As far as I can see, there is no doubt that thermal distorsion (or memory distorsion) exists in the theory, so the question is if it matters in practice. I have been thinking a bit more about this, and it seems useful to try to understand this phenomenon better from the theoretical side so we do not accidentally ascribe any non-existing mysterious properties to it.
I think we agree that the major thermal distorsion mechanism seems to be that the power dissipation of the transistor modulates the die temperature, which in turn affects the transfer function. We can model this temperature effect either as a voltage source in series with the base or as a current source in parallel with the transistor between collector and emitter. Temperature variations can probably be assumed fairly small and there is hardly any point bothering about the distorsion of the distorsion, so a linear approximation of the temperature effect on the transfer function seems sufficient. Also the relationship between power and die temperature can be considered linear, but we also have to take the thermal impedances into account, as peufeu describes.
So what we end up is a BJT where we have an extra voltage source in series with the base (or current source from C to E), the voltage of this source being proportional to the power dissipation. Lets forget the termal impedance for a moment. The AC component of the power dissipation will be of the form p = A*ic + B*ic^2, where ic is the AC component of the collector current. The temperature and thus also the distorsion voltage will be of the same form, which means it will essentially consist of a fundamental and a second harmonic. That is, we get 2nd order distorsion. Instead consider a cascoded transistor. Now the power and thus also the distorsion voltage will be on the form A*ic, that is we only have a fundamental and no harmonics! So in theory, we would not have any thermal distorsion in the cascoded case, since the thermal effect would only affect the gain. However, we have so far neglected the thermal impedances. This means the distorsion voltage is affected by some RLC network, corresponding to the thermal model of the device. But an RLC network does not introduce any distorsion (at least for us who think of distorsion as nonlinearities). The only thing it can do is to change the amplitude and phase depending on the frequency (some people seem to think of that as distorsion too). It seems thus that a reasonable approximation is that we get a distorsion signal which consists of a possibly phase shifted fundamental and second harmonic, and in the case of a cascoded transistor we only get a possibly phase shifted fundamental. Assuming this thermal distorsion is already much lower in amplitude than the signal itself there is no need to care about better modelling of the distorsion itself.
Hence, my conclusion is that although thermal distorsion is a different mechanism from the usual purely electrical distorsions, it will behave in the same way and be undistinguishable from ordinary THD.
Does anybody agree with me or does anyone spot any error in the reasoning?
As far as I can see, there is no doubt that thermal distorsion (or memory distorsion) exists in the theory, so the question is if it matters in practice. I have been thinking a bit more about this, and it seems useful to try to understand this phenomenon better from the theoretical side so we do not accidentally ascribe any non-existing mysterious properties to it.
I think we agree that the major thermal distorsion mechanism seems to be that the power dissipation of the transistor modulates the die temperature, which in turn affects the transfer function. We can model this temperature effect either as a voltage source in series with the base or as a current source in parallel with the transistor between collector and emitter. Temperature variations can probably be assumed fairly small and there is hardly any point bothering about the distorsion of the distorsion, so a linear approximation of the temperature effect on the transfer function seems sufficient. Also the relationship between power and die temperature can be considered linear, but we also have to take the thermal impedances into account, as peufeu describes.
So what we end up is a BJT where we have an extra voltage source in series with the base (or current source from C to E), the voltage of this source being proportional to the power dissipation. Lets forget the termal impedance for a moment. The AC component of the power dissipation will be of the form p = A*ic + B*ic^2, where ic is the AC component of the collector current. The temperature and thus also the distorsion voltage will be of the same form, which means it will essentially consist of a fundamental and a second harmonic. That is, we get 2nd order distorsion. Instead consider a cascoded transistor. Now the power and thus also the distorsion voltage will be on the form A*ic, that is we only have a fundamental and no harmonics! So in theory, we would not have any thermal distorsion in the cascoded case, since the thermal effect would only affect the gain. However, we have so far neglected the thermal impedances. This means the distorsion voltage is affected by some RLC network, corresponding to the thermal model of the device. But an RLC network does not introduce any distorsion (at least for us who think of distorsion as nonlinearities). The only thing it can do is to change the amplitude and phase depending on the frequency (some people seem to think of that as distorsion too). It seems thus that a reasonable approximation is that we get a distorsion signal which consists of a possibly phase shifted fundamental and second harmonic, and in the case of a cascoded transistor we only get a possibly phase shifted fundamental. Assuming this thermal distorsion is already much lower in amplitude than the signal itself there is no need to care about better modelling of the distorsion itself.
Hence, my conclusion is that although thermal distorsion is a different mechanism from the usual purely electrical distorsions, it will behave in the same way and be undistinguishable from ordinary THD.
Does anybody agree with me or does anyone spot any error in the reasoning?
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.