Magnatec FET's and their negative tempco

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Hi,

I was just wondering if anybody have been using Magnatec output FET's without Vbe temperature compensated bias?

Their curves certainly do show a negative tempco, the question I guess is whether this is "enough" by itself. Any input on this would be greatly appreciated.

Petter
 
I've used the Magnetec FETs in a couple of designs, mostly compound driver/output arrangements- they do have a true negative temperature coefficient, like the Hitachi lateral FETs, because they are also lateral MOSFETs. In both designs I included the option of some thermal compensation in the biasing, but it was basically unecessary for thermal stability.

BTW, when using combinations of Nchannel and Pchannel FETS, because Gfs and capacitances aren't matched between the positive and negative halves, you can really cut down the open loop distortion for low bias conditions using a smaller number of devices by using an output stage structure like Brystons bipolar structure, using P and N devices in each half of the output stage- the driver structure becomes a bit more complex, but that's one way to optimize it. Otherwise, I'd suggest using lots of the Magnetec devices in parallel and running moderately high bias currents, as, say, the Ayre V1 and V1x does.

Best regards,

Jon
 
Petter,

I always use lateral mosfets (Magnatec, Hitachi and others) without any temperature compensation, but only in class AB with an idle current corresponding to the null temperature coefficient point (usually 100...150 mA).

This transistors are specially made for this purpose, and they exhibit also minimum crossover distortion at this point, where transconductance is roughly the half of the value at higher currents.

This operating conditions guarantees incomparable low transient thermal crossover distortion, impossible with BJT or even vertical MOS.

Class A operation is less critical, because variations of the idle current (caused by temperature) have a negligible effect on the sound quality, and cannot overheat the transistors, because of the negative value of the coefficient (which is not the case with vertical MOS such IRFxxx)

Regards, Pierre Lacombe.
 
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