Without a fast direct proportional signal I doubt the oscillator will settle. The addition of an integrator slows the settling of the loop. Any further post integration would cause the level to skew all over. Adding a further time constant would make the leveling loop unstable and this in itself will raise the distortion. Adding an inverted copy of the ripple component to cancel whats there is what I have in mind. A very fast filter.
It's not possible to control a loop with integral alone. I found this out by trying.
The fastest possible settling of an oscillator is with direct proportional only. However with proportional only there is always an offset which varies with frequency because the proportional error cannot be driven to zero. Therefore integral must be added to drive the error to zero. When the oscillator is settled the proportional error is zero and the integrator stops changing. At zero the integrator behaves as an analog memory holding the dc value at which the oscillator is stable and leveled. Ripple riding on the DC proportional signal causes the integrator to hunt for a stable state and the ripple at the output of the integrator is summed at 90 degrees with the ripple on the proportion signal.
It a pretty messy signal coming out of the summing amplifier and the ripple waveform carries multiple harmonics. The ripple component modulates the gain of the analog portion of the loop and it's spread over an entire cycle. The distortion produced is not necessarily in phase with amplifier or element distortion.
Each source of distortion needs to be dealt with at it's source.
Cheers,
This is the most productive approach IMO. I spent time today rereading the beginning of this forum. I came to the conclusion some time ago and asked for new oscillator ideas. This ever finer detailed approach is not the best way... too complex and costly and tweaky. Though it has attained pretty good numbers.
As I reported, I tried adding in a 2H signal out of phase (resistive summing network and 2 osc) to cancel and it worked. But without phase control/locking it couldnt be a practicle way to do things. But it is pointing in a new direction. So, I look forward to your design to make this work on a deeper level more complete work.
I'm pretty much done with the 339 and others as a DIY learning project for low distortion. But they are not going to meet my goal. Cancellation and rejection of harmonics is the way to get down to the lowest level. I am sure there are many good ways to do this.
Now its time to get the others back in this to come up with more great schemes in this new direction.
Thx-RNMarsh
What I have in mind Richard is to design so that sources of distortion are not there to begin with. What I mean by this is absolute minimal contribution of distortion outside the oscillator such that what's left is amplifier contributed. There will always be some noise from AGC but this can be managed with decoupling.
The oscillator is performing very well. I hope I don't break it adding a post amplifier.
The ultimate in refinements. If the osc output is higher than a couple volts, it can just be reduced with resistive atten to drive high Z loads.... no additional THD... input Z of most products are not low Z. And maybe a buffer of super low THD can be used to drive 600 ohms, if needed. Will you also make a pcb layout for your design?
Thx-RM
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Not sure what you mean here "Will you also make a pcb layout for your design?"
It's already on a PCB. It's a rather large PCB because it has all the tuning and switching component on a single board.
Mdac tuned and relay range switching. I've decided to include rotary encoders so the oscillator can be operated with or without a PC.
I came to this decision because I don't have control over the USB drivers and don't what it to end up being a pile of junk just because windows changes.
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I have a fairly decent HP oscillator. You can find models on eBay for wel under $100. The advantage of these over the DIY circuit is the HP units typically go up to the MHz range.
But if you only need to go up to the high AF, maybe up to 40KHz then the simplest thing to do is use a computer and a GOOD audio interface. There are some prey good audio interface boxes on the market. These will work as both a generator and the input side can do thinngs like an FFT, distortion analisys and what not.
This works, 24-bits and 96K SPS
PreSonus AudioBox 22VSL | Sweetwater.com
I use this software but there are others, even Adobe Audition is very us full
Electroacoustics Toolbox
The software can generate tones as clean as you need and at the same time make plots. You can measure just about anything, the response of a single audio transformers or (with suitable amp and measurement microphone) the response of a listening room.
But if you only need to go up to the high AF, maybe up to 40KHz then the simplest thing to do is use a computer and a GOOD audio interface. There are some prey good audio interface boxes on the market. These will work as both a generator and the input side can do thinngs like an FFT, distortion analisys and what not.
This works, 24-bits and 96K SPS
PreSonus AudioBox 22VSL | Sweetwater.com
I use this software but there are others, even Adobe Audition is very us full
Electroacoustics Toolbox
The software can generate tones as clean as you need and at the same time make plots. You can measure just about anything, the response of a single audio transformers or (with suitable amp and measurement microphone) the response of a listening room.
Chris- This is a long thread but the core issue is incredibly low distortion, not frequency range. The minimum to be interesting here would be distortion products at -120 dBC. This is two orders of magnitude better that all but a very few commercial products.
No DAC is at this level of performance in practice today, although there are some that are getting close. There is a lot of analog art in the discussions and some really interesting (to us real nerds) ideas for getting a little more linearity out of the oscillators.
No DAC is at this level of performance in practice today, although there are some that are getting close. There is a lot of analog art in the discussions and some really interesting (to us real nerds) ideas for getting a little more linearity out of the oscillators.
I actually tried this after your suggestion. I put shunt cap and parallel cap all over that part of the circuit. No change in THD ! Its really all at the jFET/Osc/opamp output interface, it seems. --- that little group of parts.
Thx-RNMarsh
Hi Richard,
..... these are good points. I use the feedback technique for the JFET in the oscillator for my THD Analyzer construction project which appeared in Audio in 1981. It can be found at CordellAudio.com - Home. I employed a fairly interesting way to obtain the drain voltage/2 feedback that you might find interesting.
Cheers,
Bob[/QUOTE]
Would you give us a circuit description and the how and why that helps it to reduce THD?
Thx-RNMarsh
..... these are good points. I use the feedback technique for the JFET in the oscillator for my THD Analyzer construction project which appeared in Audio in 1981. It can be found at CordellAudio.com - Home. I employed a fairly interesting way to obtain the drain voltage/2 feedback that you might find interesting.
Cheers,
Bob[/QUOTE]
Would you give us a circuit description and the how and why that helps it to reduce THD?
Thx-RNMarsh
Rick it would be next to impossible to filter the ripple out this way. Any significant filter would render the oscillator inoperable. You'd have the get the ripple into the uV for it to be effective. There is about 45mVrms ripple at the gate of the fet with the 339a. I've proven this aspect with my oscillator using the sample and digital hold.
I can send you a paper on it if you like.
Cheers,
See if you can get it from here.
http://www.eecg.toronto.edu/~pagiamt/kcsmith/vannerson-smith-low-distortion-oscillator.pdf
Cheers,
Hi Rick,
The paper is focused on a sampled rectification of the signal but all of the issues discussed are applicable to any approach of rectifying the signal. The advantage of using an ADC for sampling is a very narrow sample window. This resolves the issue of a portion of the sine entering the oscillator from a wide sample window. Of course a dual stage track and hold sample and hold does the same but the transients of closing a switch on a hold capacitor are quite large. An ADC eliminates throughput of these transients. Secondly the issue of droop between samples is eliminated buy storing the sampled value in an DAC. The DAC will hold the value indefinitely. The droop between samples is the same issue found with conventional rectification.
Using an ADC / Mdac address two of the common problems found with conventional AGCs.
An Mdac is directly integrated into the multiplier stage and samples are directly loaded in an inverted manner. As the oscillator level increases the multiplier output signal decreases. The oscillator forces itself to a stable equilibrium very quickly. However the level is completely undefined and is different for every range and is therefore frequency dependent. The level can be adjusted by adding a dc offset voltage to the peak value sampled. A second (sample and store) loop is then required to establish a dc referenced error signal. This error signal is used as an offset to the first loop described. Rather than using two ADC/Mdac stages I multiplexed the ADC input and data output to share the a single ADC. The sample outputs are alternately routed to two Mdacs. One for the multiplier and one for the AGC DC loop. The DC loop operates as any conventional PI controller.
A pulsed integrator is used to adjust integrator TC with frequency. Any transients generated from switching occur between the sample periods leaving ample time for settling before sampling.
The system generates a ripple free low noise output. Since there are two isolated ADC/Mdac loops only the dac glitch, ADC noise and small distortion of the pass signal appear in the output of the multiplier. The Adc/dac noise and distortion is reduced by the multiplier attenuation and further reduced by decoupling between the multiplier and oscillator. The linearity of the Mdac is far better than any element I've investigated and the Mdac far exceeds analog multipliers for noise.
Cheers,
You have seen results posted in this thread.
The paper is focused on a sampled rectification of the signal but all of the issues discussed are applicable to any approach of rectifying the signal. The advantage of using an ADC for sampling is a very narrow sample window. This resolves the issue of a portion of the sine entering the oscillator from a wide sample window. Of course a dual stage track and hold sample and hold does the same but the transients of closing a switch on a hold capacitor are quite large. An ADC eliminates throughput of these transients. Secondly the issue of droop between samples is eliminated buy storing the sampled value in an DAC. The DAC will hold the value indefinitely. The droop between samples is the same issue found with conventional rectification.
Using an ADC / Mdac address two of the common problems found with conventional AGCs.
An Mdac is directly integrated into the multiplier stage and samples are directly loaded in an inverted manner. As the oscillator level increases the multiplier output signal decreases. The oscillator forces itself to a stable equilibrium very quickly. However the level is completely undefined and is different for every range and is therefore frequency dependent. The level can be adjusted by adding a dc offset voltage to the peak value sampled. A second (sample and store) loop is then required to establish a dc referenced error signal. This error signal is used as an offset to the first loop described. Rather than using two ADC/Mdac stages I multiplexed the ADC input and data output to share the a single ADC. The sample outputs are alternately routed to two Mdacs. One for the multiplier and one for the AGC DC loop. The DC loop operates as any conventional PI controller.
A pulsed integrator is used to adjust integrator TC with frequency. Any transients generated from switching occur between the sample periods leaving ample time for settling before sampling.
The system generates a ripple free low noise output. Since there are two isolated ADC/Mdac loops only the dac glitch, ADC noise and small distortion of the pass signal appear in the output of the multiplier. The Adc/dac noise and distortion is reduced by the multiplier attenuation and further reduced by decoupling between the multiplier and oscillator. The linearity of the Mdac is far better than any element I've investigated and the Mdac far exceeds analog multipliers for noise.
Cheers,
You have seen results posted in this thread.
Hi Rick,
The AP sys1 used a multiplier very similar to what Bob used in his SVO.
The sys1 uses a two stage sampling THSH system in the AGC. A comparison between the 339a and sys1 is reasonable except they are different types of oscillators, SVO and Bridged T.
The AGC ripple component in the sys1 is far less than that of the 339a.
The SVO's don't do well with output loading and generally must run at a low level. A buffer / amplifier stage is required. To be fair it must be understood that an SVO encounters much more internal loading than other oscillator types. Multiplier loading is significant. Two tuning sections and loop feedback adds more loading. This doesn't leave much for output loading.
Cheers,
The AP sys1 used a multiplier very similar to what Bob used in his SVO.
The sys1 uses a two stage sampling THSH system in the AGC. A comparison between the 339a and sys1 is reasonable except they are different types of oscillators, SVO and Bridged T.
The AGC ripple component in the sys1 is far less than that of the 339a.
The SVO's don't do well with output loading and generally must run at a low level. A buffer / amplifier stage is required. To be fair it must be understood that an SVO encounters much more internal loading than other oscillator types. Multiplier loading is significant. Two tuning sections and loop feedback adds more loading. This doesn't leave much for output loading.
Cheers,