jam said:
I have some plots at home of a few bias currents, but I stopped increasing the bias when the distortion started increasing (maybe 100 mA or so with 0.33 Ohm resistors). I'm at work now, but I'll see what I can dig up when I get home. It's a manual process with LTSpice, so it's very time consuming. I don't have one of those premium simulators that allow such things to be automated. Self has similar plots at his site, but his plots show the instantaneous slope of Vout vs Vin as a function of Vin rather than the deviation of the Vout-Vin curve from best-fit.
hi guys
what do u think about this output stg ?
on the left the normal simplified output stg with simple bias (2 transistors inside the blue circles and diodes as a bias)
the other 2 transistors make another output stg that will "help" the normal output stg to decrease crossover distortion .
those transistors biased with 2 3V zener diodes that will make the transistors to conduct more then 180 deg.
Rx should be calculated so the currennt trough it will be somthing like 0.5 amps (more than that will dissipate too much power )
i think that will help to reduse crossover distortion , am i right ?
what do u think about this output stg ?
An externally hosted image should be here but it was not working when we last tested it.
on the left the normal simplified output stg with simple bias (2 transistors inside the blue circles and diodes as a bias)
the other 2 transistors make another output stg that will "help" the normal output stg to decrease crossover distortion .
those transistors biased with 2 3V zener diodes that will make the transistors to conduct more then 180 deg.
Rx should be calculated so the currennt trough it will be somthing like 0.5 amps (more than that will dissipate too much power )
i think that will help to reduse crossover distortion , am i right ?
There's so many rivers to cross and I can't seem to find
"This is derived from an article published by HP in about 1971. This is the best area of operation for lowest distortion in the transition between class A and AB."
It would seem to me an amplifier with a signficant Class A bias will switch to AB
at a much high signal level and this transistion will occur much less of time in the music signal than at a lower level. Isn't the transconductance, Hfe linearity, and Ft more constant at a high bias level and the temperature increase that also results. I would be very careful about small emmiter resistors and high bias current, as the output stage can easily go into thermal runaway.
One would assume there would be some measurement rational for why Class A amps sound better than AB. Distortion at high levels bothers me much less than increased distortion at lower levels. Making an amp sound very good at lower levels seems to be as important as at loud and moderately loud levels.
"This is derived from an article published by HP in about 1971. This is the best area of operation for lowest distortion in the transition between class A and AB."
It would seem to me an amplifier with a signficant Class A bias will switch to AB
at a much high signal level and this transistion will occur much less of time in the music signal than at a lower level. Isn't the transconductance, Hfe linearity, and Ft more constant at a high bias level and the temperature increase that also results. I would be very careful about small emmiter resistors and high bias current, as the output stage can easily go into thermal runaway.
One would assume there would be some measurement rational for why Class A amps sound better than AB. Distortion at high levels bothers me much less than increased distortion at lower levels. Making an amp sound very good at lower levels seems to be as important as at loud and moderately loud levels.
Okay, here's some stuff I dug up. One caution, this data was taken with the older On Semiconductor model for the MJL1302A before they updated it, so it won't be as accurate as their latest. I took the data before I realized the model had unrealistic max beta.
Anyhow, one thing that's interesting is the slope of the error from best-fit near zero volts out (I added an offset to the input so that I got zero Volts out for zero Volts in). If the error slope is positive, the incremental slope is greater than the best-fit. Likewise, if the slope of the error is negative, the incremental slope is less than the best-fit (underbias condition). So clearly 30 mA is underbiased, and 65 mA shows a gain increase near zero volts relative to the best-fit. But the overall error for 65 mA still looks pretty good. I'd like to see more curves of course. Maybe I'll look into how the simulation process can be made more automated, maybe with a swept parameter. I stopped increasing the bias current when the slope of the incremental error became positive near zeor volts
Anyhow, one thing that's interesting is the slope of the error from best-fit near zero volts out (I added an offset to the input so that I got zero Volts out for zero Volts in). If the error slope is positive, the incremental slope is greater than the best-fit. Likewise, if the slope of the error is negative, the incremental slope is less than the best-fit (underbias condition). So clearly 30 mA is underbiased, and 65 mA shows a gain increase near zero volts relative to the best-fit. But the overall error for 65 mA still looks pretty good. I'd like to see more curves of course. Maybe I'll look into how the simulation process can be made more automated, maybe with a swept parameter. I stopped increasing the bias current when the slope of the incremental error became positive near zeor volts
Attachments
I don't know your design goals, but I thing that you should connect both amps in series not parallel:
http://www.diyaudio.com/forums/showthread.php?postid=241615#post241615
http://www.diyaudio.com/forums/showthread.php?postid=241615#post241615
Triple darlington and Quad triple are different things.
For Quad triple a brilliant idea is
http://www.angelfire.com/ab3/mjramp/index.html
For Quad triple a brilliant idea is
http://www.angelfire.com/ab3/mjramp/index.html
ohh so that's what you mean
Hi SSS,
Sorry for the confusion.
I think you need to isolate the diver stage, or it's DC current will be dependent on the current running throu the top resistor. (I presume the input is getting it's supply throu that same resistor?)
The middel transistors will have alot of voltage gain, perhaps this will give problems whith stability...must look at it a bit more.
I think it's better to have the drivers working in class A, also this helps to improve turn off time for the output devices.
\Jens
Hi SSS,
Sorry for the confusion.
I think you need to isolate the diver stage, or it's DC current will be dependent on the current running throu the top resistor. (I presume the input is getting it's supply throu that same resistor?)
The middel transistors will have alot of voltage gain, perhaps this will give problems whith stability...must look at it a bit more.
I think it's better to have the drivers working in class A, also this helps to improve turn off time for the output devices.
\Jens
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