HI AKSA!!!
I made the bootstrapp and now is FAR more stable.
Thank you very much for your advices!
Now I`ll try to experiment with the BD139`s emitter resistor as ilimzn told me..
ILIMZN i tebi hvala veliko, tvoji saveti su od velike pomoci PoZdrav!!!
does enyone of you know, what voltage sving, I must have on the input, for the maximum power? Is it 12V AC?
I made the bootstrapp and now is FAR more stable.
Thank you very much for your advices!
Now I`ll try to experiment with the BD139`s emitter resistor as ilimzn told me..
ILIMZN i tebi hvala veliko, tvoji saveti su od velike pomoci PoZdrav!!!
does enyone of you know, what voltage sving, I must have on the input, for the maximum power? Is it 12V AC?
Hi Bogdan,
I think the gain of your output stage is close to 1.
I have seen figures quoted for FET output with a gain of 0.9 or so when asked to drive 4r or 8r non reactive loads.
To get 35Vpk output you will need 35/0.9 = 38.9Vpk = 27.5Vrms.
However, this is more than your Vrails but the bootstrap could allow these numbers to be achieved.
I think the gain of your output stage is close to 1.
I have seen figures quoted for FET output with a gain of 0.9 or so when asked to drive 4r or 8r non reactive loads.
To get 35Vpk output you will need 35/0.9 = 38.9Vpk = 27.5Vrms.
However, this is more than your Vrails but the bootstrap could allow these numbers to be achieved.
AndrewT and bogdan,
Please review a bit how a follower works. By definition, it cannot have gain higher than 1, and in general it will be lower than that, the closer to 1 the higher the gm of the output devices, and the higher the load resistance. Here is a very simplified example, assuming a device with 1A/V gm and 10 ohm load:
10V output requires 1A current through the 10 ohm load. For 1A, the output device requires 1V at it's input, which is the DIFFERENCE between follower input and output. Therefore, for 10V on the output, 11V needs to be given at the input, so the voltage gain is 10/11 = 0.909.
In reality, things are not so simple:
1) Two devices operate at the same time
2) gm is not constant but depends on output current and to a lesser extent, voltage across D and S, and there is a threshold voltage below which the amplifying devices do not amplify at all (gm=0)
3) There is a bias current, which means there is a DC current at which we have to calculate gm for AC=0
4) The follower has input capacitance which robs the previous stage of current by shunting it to the power rails and the output, that results in an effective drop in gain as frequency rises. Fortunately, this is easy to keep outside the audio band (but you do get other problems such as nnlienar capacitances).
Zener diodes across G and output have little to do with this. They just limit the maximum voltage on the gates. For typical vertical MOSFETS, about 6V is enough to pass well over the rated current for the FET at room temperature, and the voltage falls as temperature rises. Source resistances must be taken into account, though - they add a voltage drop equal to instantaneous current times source resistance. So, for 0.22 ohm resistors, you can drop 6V before you start limiting current by not alowing enough Vgs on the MOSFETs, that would translate into a maximum peak current of about 27.3A, which is actually more than the rated current for the output devices. In realistic situations, it would be prudent to set this limit lower, but this may be irrelevant since the MOSFETs used are not amongst the most sturdy when used in linear mode, due to low maximum power dissipation (IRFP9140/240 have about the same maximum ratings but 2x maximum power dissipation, and the mass of the metal in the larger case also makes them much more immune to instantaneous heating due to larger peak currents).
AndrewT, the curves are combination of datasheet diagrams and spice models (which turn out to be quite accurate, actually), they were drawn in spice or copied from datasheets, then scaled and overlayed in photoshop. One of these days I should trace the curves at low currents (below 0.5A), data is not very accurate for this. One should be aware when looking at the datasheets, to compare Vgs versus Id plots for similar conditions (speciffically same or close Vds), ditto when looking at gm figures, often they are given for different measurement conditions (different Id most often).
Please review a bit how a follower works. By definition, it cannot have gain higher than 1, and in general it will be lower than that, the closer to 1 the higher the gm of the output devices, and the higher the load resistance. Here is a very simplified example, assuming a device with 1A/V gm and 10 ohm load:
10V output requires 1A current through the 10 ohm load. For 1A, the output device requires 1V at it's input, which is the DIFFERENCE between follower input and output. Therefore, for 10V on the output, 11V needs to be given at the input, so the voltage gain is 10/11 = 0.909.
In reality, things are not so simple:
1) Two devices operate at the same time
2) gm is not constant but depends on output current and to a lesser extent, voltage across D and S, and there is a threshold voltage below which the amplifying devices do not amplify at all (gm=0)
3) There is a bias current, which means there is a DC current at which we have to calculate gm for AC=0
4) The follower has input capacitance which robs the previous stage of current by shunting it to the power rails and the output, that results in an effective drop in gain as frequency rises. Fortunately, this is easy to keep outside the audio band (but you do get other problems such as nnlienar capacitances).
Zener diodes across G and output have little to do with this. They just limit the maximum voltage on the gates. For typical vertical MOSFETS, about 6V is enough to pass well over the rated current for the FET at room temperature, and the voltage falls as temperature rises. Source resistances must be taken into account, though - they add a voltage drop equal to instantaneous current times source resistance. So, for 0.22 ohm resistors, you can drop 6V before you start limiting current by not alowing enough Vgs on the MOSFETs, that would translate into a maximum peak current of about 27.3A, which is actually more than the rated current for the output devices. In realistic situations, it would be prudent to set this limit lower, but this may be irrelevant since the MOSFETs used are not amongst the most sturdy when used in linear mode, due to low maximum power dissipation (IRFP9140/240 have about the same maximum ratings but 2x maximum power dissipation, and the mass of the metal in the larger case also makes them much more immune to instantaneous heating due to larger peak currents).
AndrewT, the curves are combination of datasheet diagrams and spice models (which turn out to be quite accurate, actually), they were drawn in spice or copied from datasheets, then scaled and overlayed in photoshop. One of these days I should trace the curves at low currents (below 0.5A), data is not very accurate for this. One should be aware when looking at the datasheets, to compare Vgs versus Id plots for similar conditions (speciffically same or close Vds), ditto when looking at gm figures, often they are given for different measurement conditions (different Id most often).
Thanks very much AKSA and ILIMZN!
You`ve been very helpfull to me!
I started this project, because I wanted to constuct my own power amplifier from the begining and I wanted to learn as much as I can during this making process.
I didn`t start from "the start", I started from exit(power) stage, then developed the bias stage and now I`m in the prosess of fine adjusting...
I accidentaly found transistor 2SC3964 and tried to put it in the bias stage instead the BD139. Now the bias current is more stable! 2SC3964 has hfe>500 and is temperature compensated for audio amplifer output stage (I read this in datasheet).
Does high hfe has anything with it`s stability in this bias stage?
Cheers, and thanks again!
You`ve been very helpfull to me!
I started this project, because I wanted to constuct my own power amplifier from the begining and I wanted to learn as much as I can during this making process.
I didn`t start from "the start", I started from exit(power) stage, then developed the bias stage and now I`m in the prosess of fine adjusting...
I accidentaly found transistor 2SC3964 and tried to put it in the bias stage instead the BD139. Now the bias current is more stable! 2SC3964 has hfe>500 and is temperature compensated for audio amplifer output stage (I read this in datasheet).
Does high hfe has anything with it`s stability in this bias stage?
Cheers, and thanks again!
Hi,
a higher Hfe means the multiplier draws less current through it's base. This in turn has less effect on the voltage division in the resistor string. I normally recomend that the base current should be less than 10% of the resistor string current. I cannot confirm but this may improve stability of current control.
I do not have any data on your replacement transistor so can't identify if other characteristics could influence stability.
a higher Hfe means the multiplier draws less current through it's base. This in turn has less effect on the voltage division in the resistor string. I normally recomend that the base current should be less than 10% of the resistor string current. I cannot confirm but this may improve stability of current control.
I do not have any data on your replacement transistor so can't identify if other characteristics could influence stability.
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