iraudamp1 problem

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fet substitution ok?

:confused: hi there I hope its not offtopic ,i have a question: i have an amplified speaker and the woofer amp is almost an exact copy of the shematic posted in pdf, but i cannot get the IRFB23N15D, instead i got FQA28N15; looking at the datasheets i see my fets are similar in current and voltages, but they seemed too slow in rise and fall times, also on sw time, can they be used in that circuit? thanks for your time and attantion.
Martinez:cool:
 
thanks Anonymus

:smash:just to say thanks to the anonymus for the reply, and yes theyre bigger but i had made room for them just took me 4 drills and ok!
But in the mean time i was thinking, if theyre like ten times or more slower; will that be a problem, so would have to tweak the dead times or something? Anyway a friend came by and told me he had this IRFB31N20D, and theyre almost the same but a bit higher current and V (31A/200V)!! he also explained about the code says it so.
So i bought two and now im about to replace and check things.
just have a doubt about the driver which is IR2011. By the way this amp has only a 4069 IC doing the job those two do in the schem.,and the PS is a linear 40-40v !
thanks and be happy!
Martinez:cool: :smash:
 
MOSFET switching times on datasheets are meaningless. They depend on the ratio between gate charge, gate test resistor and test Vgs. The latter two are different for almost every datasheet, so you can't do direct comparisons.

The parameters to compare are gate charge (at the same test Vgs), body diode reverse recovery charge (at similar Id and di/dt) and Rds-on (at similar Vgs, Id and temperature). Low capacitances are also a good thing, but the usual measurements at 25V ot 30A are not very meaningful as one device may exhibit lower capacitance than other at 25V but higher at 100V or 150V, which is what usually matters for switching losses.

All the MOSFET models mentioned except FDP2552 and FDP42AN15A0 are junk. FDP2552 is one of my favourites.
 
"It is a half-bridge current mode design."

Did you include a balancing winding or other means to balance the voltage on the cap in series with the transformer? Without it the voltage on the cap will be undefined and uncontrolled.

from http://focus.ti.com/lit/ml/slup083/slup083.pdf :
"The Stability Problem of the Half Bridge Topology
Using Current Mode Control (Refer to Figure 3)
Assume that 02 closes with a longer pulse width than 01.
Current mode control keeps the peak current equal, so the
amount of charge transferred from C2 is more when 02 is
closed. As a result the voltage at node 2 will decrease. The
next time 02 closes the voltage across the primary will be
less so the current ramp will have a slower slope. The peak
current will be kept the same, so the pulse width will be
wider: This means that the node 2 voltage decreases even
further; and eventually reaches zero. It is this stability problem
that has prevented the widespread use of the halfbridge
topology with current mode control. Fortunately
there is a simple solution to this problem, using an auxiliary
transformer winding made of small diameter wire with the
same number of turns as the primary winding, and two
small high voltage diodes. The credit belongs to an
unknown engineer who attended one of our seminars in
1984."

Another link, this one shows a trick for the current sensing so bad stuff won't happen due to the balancing current:
http://www.fairchildsemi.com/an/AN/AN-7531.pdf
 
megajocke; Thanks much for your input on the SMPS problems. I am familiar with the TI literature but had never seen the one from Fairchild. I need to study that. I have used balancing windings and have had some problems with them, but that's not my main problem. My main problem seems to be related to noise in the current feedback. My suspicion is most of our transformers, both the main and the current transformer, have higher leakage inductance than they should. This must contribute to the noise problems. Of course my PCB design may be less than optimum as well! What I get in current mode is a pulse width that is not constant under fixed load tests. Its not unequal pulses which do happen if I remove the balancing winding, but random noise-like changes. In other words, jitter. The output of the current transformer shows the slope of the inductor current waveform (as reflected back in the primary current) to be rather flat. I understand this is one of the reasons for noise susceptibility. My idea of moving to a cascade design is that the buck converter will at least have a well defined current slope for the current mode control. Moreover if I can use a current fed topology (would have to be full bridge instead of half), I think the whole switching noise problem may become much less although I don't know and I suppose there will be other problems to face then too! Thanks for your help, and if you have any other suggestions for reading, I'd appreciate the references. I have the classic Pressman and Billings books, and have downloaded most of the TI stuff.
 
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