inquiries about LTP topology

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parsecaudio said:
Hi MikeB
Why you say that the amp are inverting?
The output on the first diff.are from non invert.side and the output of the transistor on the second stage is from the emitter that drive another emitter.This is another non-invert circuit.
The design are correct,sure.
The connection emitter - emitter(i.e. low impedance that drive a low impedance) have at my advice not advantage in comparison to a classic cascode stage.

I was talking about the 2nd stages, the normal is not inverting, the other is.

Simple explanation for both types:

Assuming the current rises from the upper diffamp output, the voltage across the resistor relative to the +rail rises.
In normal configuration, with a pnp having its emitter toward the +rail, this increases current into the vas on the upper side, voila, non inverting operation here.
On the other configuration, using a npn having its emitter downwards to the emitter from the cascode, the vbe falls, the current reduces, -> inverting opration.

Thats why the first needs to be connected to the inputside of diffamp, and the other to nfb side of diffamp, to keep whole amp operation non inverting.

Mike
 
Tried this sometime ago...

...but was unstable....heavy shunt compensation at second stage output required; this increases distortion significantly....
 

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OOOOOPS!!!!
MikeB,
I make an enormous error in the reading of the schematic.
I have assumed that both transistors in the second stage have the same polarity:for this reason the circuit appears to me so strange.
I have seen too much late that I had written mistaken:you had already read my post with the conceptual error before that I cancelled it.

Sorry for this,Mike

:smash:
:dead:
 
Guys, could we please hold the horses here, and dial back complicating an ordinary LTP because this will not help the original thread starter.

keantoken said:
Okay, but wait... Aren't the transistors negatively biased? Wouldn't this result in no current, or is this how you bias transistors in an LTP?

No they are not and no you don't! See, this is what we are talking about here, there seems to be a lack of understanding the circuit at the most basic level, before you start complicating, you need to cover this!

Assuming that the gain is 0


And why would you assume that?

The dreaded question: Am I right? *prepares for utter disapointment* [/B]

Here's a piece of advice: most if not ALL electronics circuits are, in their very basic principle, SIMPLE. Three rules to follow: all voltages in a full circuit add to zero, all currents in a node add to zero, the rest is covered by Ohm's law.
So, let's see what we have here:

Given values:
-V = -6v
+V = +6v
all 3 resistors = 1k
V+In and V-In set to -1v
Beta assumed at infinite, Vbe as 0.7B as in the previous question.

Assuming infinite Beta of the BJts, is another way of saying, no Ib flows at all. This considerably simplifies things.

Step 1:
Biassing sanity check:
In this problem it is GIVEN that both bases are tied together at -1V, so for the transistors to be properly biassed, the emitters should be 0.7 below that at -1.7V. Can they be? Simple to check: see if there is a current path to a node that is more negative than -1.7V - and sure enough, there is, it goes through the common emitter resistor and into the -6V negative supply.
Also, the voltage at the collectors has to be at leas equal to that of the bases, or higher in order for the transistor to be properly biassed. Can it be? Again, simple to check: yes, there is a path for the current that connects to a node of signifficantly higher voltage, namely the positive supply. Still, because we do not yet know Ic, we will still have to check on this later on.

Step 2:
Given that emitters are at -1.7V and -V os -6V, there is 4.3V across RE. Current through Re is therefore 4.3/1k = 4.3mA.
Since both transistors are exactly equal and perfect, it splits exactly evenly between their emitters, so Ie1=Ie2=2.15mA.

Step 3:
Since beta=infinite, this means Ib=0. And since Ie=Ib+Ic, it follows that Ic=Ie. Therefore, we know the current through the collectors, and hence the collector resistances. This gives us the voltage drop across the collector resistance, as 2.15mA * 1k = 2.15V.

Step4:
Because collector resistors drop voltage from the positive supply down, the collector voltage is 6V - 2.15V = 3.85V, and because the collector currents are precisely equal, both outputs are at the same voltage.

So, there you are - the DC conditions have been calculated by math that does not even need a calculator.

And now, here is a bit more education:
Let's demonstrate the basic reason for the LTP - ability to amplify signal difference.

Lets see what happens when the voltage connected to both bases is changed? Both collector voltages change the same way at the same time. How much? Let's see: because Re=Rc, and half of the emitter resistor current flows through the collector resistors, every change of voltage at the bases produces half that change of voltage at the collectors - the circuit actually attenuates common signals.

And what if the voltages were different? Because ANY difference in the base voltages would produce a difference in base current. Because beta is infinite, the change in collector current would also be 'infinite'. Since the collector current can only change as much to either become infinitely small, or as much as the colector and emitter resistors will alow for. Even so, within that realm, the gain of the circuit for differential signals would be infinite.

Finally: as to the reply to my previous question:
- Current equals precisely zero
- Output voltage is undefined
 
Hi, Mikeks,

Power amp Sony TA-N90ES also uses Pmosfet (Q405=2SJ313) which is driven directly from input differential pair which has current mirror as it's load.

It is like figure no.2 in post #25.

Can it still be called TIS/Transimpedance stage; current in, voltage out?

It is high impedance driving high impedance. What do you think of this, is it OK ?

Hi, AKSA,

How are you :D
I still learning about how to judge an input/output impedance of a node. Sometimes I get confused by this. Which is low and which is high impedance, is confusing.

Usually the best is to have low impedance source driving high impedance receiver (like 100ohm preamp output driving 22kohm input power amp). But I don't know if this convention is applicable for nodes in power amp schematic.

But in many nodes in power amps, I get confused. Many high impedance driving low impedance. Like picture2 in post#25, when the VAS is bipolar, it will be high impedance driving low impedance.

Maybe if I can understand this "impedance" matching within nodes in power amp structure, I can find a way to make better sounding power amp :D
 
AKSA said:
Kanwar,

This is elegant beyond words.......

However, it has supernatural gain, and the feedback factor is too high, and moreover, there is no phase reversal, so you should run it from the feedback side, not the input side, and what about the overload latch?

I know you've solved all these problems, Kanwar, just stirring you up.......

Cheers,

Hugh
Hi Hugh,

Yeah the OLG is extremely high, no phase reversal and also the Slewrate in my prototype is above 100V/uS... also the Clip recovery is instant as compared to normal VAS.......

janneman said:



Kanwar, nice...

I would put those extra supplies on top of the output fets on gnd instead of on top of the output supplies. Otherwise, your output supply ripple will be replicated on top of the vas supply, and you don't want that, right?

Jan Didden

Hi Jan,
You like that design.....
Yeah Sure, but driving low impedance loads down to 2 ohms poses stress on Mosfet rails ,results in sagging and the VAS then would drive the gates far beyond their Vgs limits which would result in the destruction of mosfets.....though gate to source clamping Zeners could solve the problem.

parsecaudio said:
Hi MikeB

The connection emitter - emitter(i.e. low impedance that drive a low impedance) have at my advice not advantage in comparison to a classic cascode stage.

Wrong, This CC-CB offers much wider OL Bandwidth and higher OLG in comparision with normal CE-CB cascode....Also the Slewrate is much higher than the normal cascode....

regards,
K a n w a r
 
Hi Workhorse
an excessive bandwidth is not a good thing on audio amp.The cascode(rigid or floating) offers a gain and a frequency responce
that are enough widely for an audio circuit.
A largher bandwidth can give many stability problems that can be
solved with a frequency compensations.

Then why to have a high bandwidth and gain when it must to be reduced for closed loop operations?
 
lumanauw said:
Hi, Mikeks,

Power amp Sony TA-N90ES also uses Pmosfet (Q405=2SJ313) which is driven directly from input differential pair which has current mirror as it's load.

It is like figure no.2 in post #25.

Can it still be called TIS/Transimpedance stage; current in, voltage out?

It is high impedance driving high impedance. What do you think of this, is it OK ?


Transimpedance stage=(MOSFET/BJT cascode+Miller compensaton capacitor).
 
Hi Mikeks
In audio applications,as you know, others features are required to a circuit than an absolutely useless high bandwidth.
More important are the linearity in a circuit.
The circuit that you have built is very critical for stability due to the very high bandwidth and gain of the second stage.
With voltage feedback,a compensation network should be added(and distortion at high AUDIO frequencies will rise) .

It is not always true with the current feedback circuits but this is another speech......

Warmest regards

Vittorio
 
ilimzn,

Regarding post 46, you did a good job covering the DC operating point of the circuit; however, I don't care for the notion of infinite Beta. I'm ok with assuming the base current is negligable and may be ignored in many cases, but it isn't zero.

This leads me to your description of the circuit gain. If you assume infinite Beta, then you description is correct. In reality the gain, (I prefer use of the term differential amplifier or transconductance amplifier, because that's what it is) acutally, transconductance, is given by:

differential collector current/Vin= 2*gm

where gm= 40 * Ic (at room temperature and Ic is the DC operating current)

So with IC = 2.15 mA the gain is 2*40*.0025

Rick
 
sawreyrw said:
ilimzn,
...I don't care for the notion of infinite Beta... In reality the gain, actually, transconductance, is given by: differential collector current/Vin= 2*gm where gm= 40 * Ic (at room temperature and Ic is the DC operating current)

I'm not disputing that for a second - BUT please remember that we are still talking to someone who needs to first grasp the notion of gain in it's many forms.
Before we go there, it is actually quite usefull to think in exaggerations like 'infinite gain'. Quite usefull to figure out what a circuit does, before we go into how 'much' it does it.
 
ilimzn,

BUT please remember that we are still talking to someone who needs to first grasp the notion of gain in it's many forms.
Before we go there, it is actually quite usefull to think in exaggerations like 'infinite gain'. Quite usefull to figure out what a circuit does, before we go into how 'much' it does it.
I agree that keantoken has to understand the basics, so I would not have addressed the gain of the LTP. It goes a bit beyond the basics. That's all.

BTW, how does the quote work? Obviously, I don't know.

Rick
 
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