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FS: new 10k ladder type VRs

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You may need to give consideration the CMRR for this project.

With a discrete balanced amplifier, the gain of one polarity or the other needs to be independently adjustable for common mode rejection (CMRR). Using 1% parts and not allowing for transistor variations the positive and negative signal paths could easily achieve a gain difference of 2%. That would be a CMRR of only 33 dB. In an ideal amplifier a signal applied to both positive and negative inputs in phase would create a zero differential signal at the output.

Even if corrected at one gain setting, the consequence of using a stepped attenuator may well require closer resistor matching than 1%.

Besides the design issues, the CMRR probably will need to be checked and set after the circuit is built or modified.
 
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