Hi, AKSA,
How are you
Very good explenation, thank you. Don't get me wrong, I'm not suggesting that using slow, medium, fast is the only "right" way, I just suggesting Richie for an "experiment", since in post #39 he asked this :
I really think that you has conducted far more experiments than I do
How are you
Very good explenation, thank you. Don't get me wrong, I'm not suggesting that using slow, medium, fast is the only "right" way, I just suggesting Richie for an "experiment", since in post #39 he asked this :
If we are to use dominant cap, your explenation makes the sense, because external cap will be more linear than transistor's internal cap. But if we have intention not to use dominant cap, maybe we have to choose the transistors, cannot just use the fastest available.
I really think that you has conducted far more experiments than I do
from Lavardin's website:
Let's get serious again here. If you want to avoid capacitor dielectric distortion then use low distortion capacitors like polystyrene (for extremists air core is better, silk cores work well to) and avoid most ceramics. Or avoid the capacitor altogether and use a transistor with relatively high Ccb. The main reason that VAS stages almost always have a discrete capacitor is because Ccb is very Vcb sensitive and this makes it VERY non-linear. Ccb may often vary +/- 50% across the output swing. Other reasons include the need for high C and the need for a stable C value in production.
It is as simple as that.
Good grief!
Let's get serious again here. If you want to avoid capacitor dielectric distortion then use low distortion capacitors like polystyrene (for extremists air core is better, silk cores work well to) and avoid most ceramics. Or avoid the capacitor altogether and use a transistor with relatively high Ccb. The main reason that VAS stages almost always have a discrete capacitor is because Ccb is very Vcb sensitive and this makes it VERY non-linear. Ccb may often vary +/- 50% across the output swing. Other reasons include the need for high C and the need for a stable C value in production.
It is as simple as that.
Hi Traderbam,
I think yes. We can scotch this one from first principles.
The CB junction is reverse biased, so a depletion layer with moving charges within it exists at all times. The width of the depletion layer depends on Vce, of course, but also current.
Any semiconductor region which passes a current and yet has a large voltage across it has both capacitance and resistance. The flow of current and consequent existence of charge indicates that this region could be considered as a capacitor with very high dielectric absorption, OR as a resistor with very high capacitance, take your pick.....
In either scenario, the notions of capacitance and resistances are blurred, and it logically follows that dielectric absorption, which contributes principally to memory effect, is a real issue.
Do I lose my head?
Andrew, I agree, there are unexplained issues here. Why, if miller capacitance is so large and Cdom so small, are small increments in Cdom so influential on the sound quality?
David, all this is detective work. Alas, all I have is an inquiring mind and a good CRO, not much else. I have tried to relate topology and compensation issues to sound quality, and been moderately successful so far, but failed miserably in explaining in simple terms why these phenomenon take place.
Cheers,
Hugh
I think yes. We can scotch this one from first principles.
The CB junction is reverse biased, so a depletion layer with moving charges within it exists at all times. The width of the depletion layer depends on Vce, of course, but also current.
Any semiconductor region which passes a current and yet has a large voltage across it has both capacitance and resistance. The flow of current and consequent existence of charge indicates that this region could be considered as a capacitor with very high dielectric absorption, OR as a resistor with very high capacitance, take your pick.....
In either scenario, the notions of capacitance and resistances are blurred, and it logically follows that dielectric absorption, which contributes principally to memory effect, is a real issue.
Do I lose my head?
Andrew, I agree, there are unexplained issues here. Why, if miller capacitance is so large and Cdom so small, are small increments in Cdom so influential on the sound quality?
David, all this is detective work. Alas, all I have is an inquiring mind and a good CRO, not much else. I have tried to relate topology and compensation issues to sound quality, and been moderately successful so far, but failed miserably in explaining in simple terms why these phenomenon take place.
Cheers,
Hugh
Workhorse said:
Just for you I have downloaded new software so that I can draw the full schematic. Still getting to grips with the software though...
I have decided to abandon the design anyway, as it inherently has a turn-on thump due to the input being at a slight voltage offset from ground. I'm trying to design a noiseless on/off amp.
I have just designed an output stage with hybrid bjt-mosfet (BD139/40 2SK1530/2SJ201) using Sziklai topology with relatively low distortion based on simulation results and was planning to make my first prototype soon. I did expect a straightforward build until i read this forum.
Any experience or advise?
Any experience or advise?
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.