I've started briefly to think about the power stage and how to make a decent mosfet-driver. Mainly to deliver enough current to charge/discharge the mosfets at correct voltage level. I basically copy what a mosfet driver does in a more basic way. One question, is bipolar or fets preferable to use like this?
Eventually I'd like to get some delay into this too by using the rise time as i talked about. before. Will maybe not be able to do it fast enough... but we'll see about that!
This, as i (realized) would more or less need some kind of feedback. One question i have about the post filter feedback loop is what calculations that is necessary there? It's quite obvious that you need to filter the signal since comparing an binary signal to an analogue will make the circuit oscillate that fast it basically become a class-B amp, right? So how do you roughly calculate this frequency?
Also, how fast does the switching frequency need to be? The sampling rate of music is usually ~45kHz, so that would mean that switching speed don't need to me more than ~90kHz? This is of high interest since lower frequency means less stress on the power stage components.
I think the exam turned out well! Atom physics is not my favorite really, but i should at least have passed
Eventually I'd like to get some delay into this too by using the rise time as i talked about. before. Will maybe not be able to do it fast enough... but we'll see about that!
This, as i (realized) would more or less need some kind of feedback. One question i have about the post filter feedback loop is what calculations that is necessary there? It's quite obvious that you need to filter the signal since comparing an binary signal to an analogue will make the circuit oscillate that fast it basically become a class-B amp, right? So how do you roughly calculate this frequency?
Also, how fast does the switching frequency need to be? The sampling rate of music is usually ~45kHz, so that would mean that switching speed don't need to me more than ~90kHz? This is of high interest since lower frequency means less stress on the power stage components.
I think the exam turned out well! Atom physics is not my favorite really, but i should at least have passed
MosFets or BJT for the driver?
==> Both can be done with good results. Choose what you are more experienced in.
Delay / dead time by slow rise time of Ugs:
Possible, as long as you are not heading for highest dead time precision.
Feedback:
Sounds like you are talking about a self oscillating solution, right?
In the forward path you get a mostly constant propagation delay (comparator, level shifter, gate driver, MosFets) and the output filter phase shift (time lag).
In the feedback you can put a D portion.
This constelltaion you will find in UcD.
Oscillation happens at that frequency at which the sum of times and/or phase shifts in the loop equal to half of the period time (180 deg).
But you could also go for a hysteretic approach.... or clocked...
Most simple for understanding are the hysteretic approaches with pre filter feedback.
Switching frequency:
You already got the point. Excessive switching frequencies will cause higher stress to the switching devices.
On the other hand - higher switching frequencies allow easier filtering (how much ripple do we want to have on our speaker wires?), higher loop gain, better step response.
90 kHz is possible, but above topics may push you to higher frequencies.
For a full range application with MosFet technology of the year 2011, I would recommend the frequency range between 200kHz up to 400kHz.
For educational purpose, clearly more to the lower side.
==> Both can be done with good results. Choose what you are more experienced in.
Delay / dead time by slow rise time of Ugs:
Possible, as long as you are not heading for highest dead time precision.
Feedback:
Sounds like you are talking about a self oscillating solution, right?
In the forward path you get a mostly constant propagation delay (comparator, level shifter, gate driver, MosFets) and the output filter phase shift (time lag).
In the feedback you can put a D portion.
This constelltaion you will find in UcD.
Oscillation happens at that frequency at which the sum of times and/or phase shifts in the loop equal to half of the period time (180 deg).
But you could also go for a hysteretic approach.... or clocked...
Most simple for understanding are the hysteretic approaches with pre filter feedback.
Switching frequency:
You already got the point. Excessive switching frequencies will cause higher stress to the switching devices.
On the other hand - higher switching frequencies allow easier filtering (how much ripple do we want to have on our speaker wires?), higher loop gain, better step response.
90 kHz is possible, but above topics may push you to higher frequencies.
For a full range application with MosFet technology of the year 2011, I would recommend the frequency range between 200kHz up to 400kHz.
For educational purpose, clearly more to the lower side.
Thank you four your reply!
So the easiest way to calculate is just to estimate how long time it takes for each step to respond... which it a real pain in the *** to find out, right? I guess currents, where the potential proto board (for testing) will have a big influence, also will affect the frequency...
About time delay, I'm currently having a course called "design of digital circuits" where we had an elaboration where one of the tasks was to create a D-latch with its driver. Very similar to;
The driver have one input D, (during the elaboration this was set to "clock") where the outputs, Q and Q' have both switches to 0 when the clock changes state (at the clock signals flanks) and then to Q=D and Q'=D_inverted.
Anyways, my thought wast to use this setup for the home made mosfet driver to avoid shorting trough the mosfets. I actually think i have seen that kind of setup in a data sheet for some driver.
So the easiest way to calculate is just to estimate how long time it takes for each step to respond... which it a real pain in the *** to find out, right? I guess currents, where the potential proto board (for testing) will have a big influence, also will affect the frequency...
About time delay, I'm currently having a course called "design of digital circuits" where we had an elaboration where one of the tasks was to create a D-latch with its driver. Very similar to;
An externally hosted image should be here but it was not working when we last tested it.
The driver have one input D, (during the elaboration this was set to "clock") where the outputs, Q and Q' have both switches to 0 when the clock changes state (at the clock signals flanks) and then to Q=D and Q'=D_inverted.
Anyways, my thought wast to use this setup for the home made mosfet driver to avoid shorting trough the mosfets. I actually think i have seen that kind of setup in a data sheet for some driver.
The dead time of this circuit will directly depend on the propagation delay of the chosen devices. Which is not bad, you just have to choose the technology with the speed which you need.
But take care, the timing which you may find at the MosFet gates might differ from what this circuit generates, because of multiple additional delays of the level shifter and gates drivers. These delays often show a systematical dependency on the direction of transition.
But take care, the timing which you may find at the MosFet gates might differ from what this circuit generates, because of multiple additional delays of the level shifter and gates drivers. These delays often show a systematical dependency on the direction of transition.
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.