Does USB->I2S make sense ?

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peufeu said:
It's part of the USB audio standard. Unless you use asynchronous isochronous mode (which needs special hardware ie not PCM27xx) your clock will be derived from USB ticks.

USB audio standard 2.0 should correct this.

I'm building a FPGA based USB soundcard which will do it the right way (ie clock in the DAC)...
That sounds like a very interesting project peufeu. I think wavelength audio, and emipiricle audio have done USB 1.1 async mode receivers using TAS1020B, but this is limited to 24/96. I'm sure there must be plenty of microcontrollers now capable of handling higher bit rates? I would be very interested in such a project - I think I read somewhere that it took a year or more to develop the s/w that they use, but I'm sure an opensource project could get done more quickly, with the right ucontroller - any suggestions? Does windows/linux support async mode directly? ie do the wavelength/empiricle DACs require special drivers? What bit rate do the windows (or linux) drivers go to?


BrianDonegan said:
USB -> I2S -> ASRC (with good clock) -> DAC. Then the USB source jitter doesn't really matter.
I don't agree. I think I read either the wavelength, or empiricle audio guy say that such USB receivers "go nuts" every 90 seconds or so. Any time you have two clocks that are not synchronizing in some way, they will drift. It's only a matter of time before they drift so far that your buffer is overrun or starved. I think I read that the USB clock can be 1% out - that's quite a rate of drift. Either you synchronize the clocks, or you "synchronize" the data with async buffer handshaking.

sangram said:
Not exactly my question, I was referring to running the 9008 in SPDIF mode (direct SPDIF input, not I2S).

I was looking for a point of view between USB->I2S (or any other I2S-converted mode) and direct SPDIF, actually.
I would think that even in the short distance between receiver and DAC, spdif could introduce some jitter, and the DAC still has to "recover the clock" to some degree, whereas the seperate clock of I2S makes this much less a problem.
 
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