Development of a "reference" class D starting point

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skaara said:
And about that simple circuit which can be assembled in 10 mins and plays bad (but it plays:)), post a simple schematic so ill try it:)

http://hem.passagen.se/johanps/archive.htm (watch the pop ups)

You'll find some decent circuits there, I wired a version of one up in about 10 minutes. No mosfets just a double inverter made with bjt's as output, made own coil, had 1 op amp and 1 comparator.

I will restate so it's clear and no one is insulted: My 10 minute version of it sounded bad (it had to), but made sound. If you put more effort into it than I did I'm sure it would pay off. It's still sitting on the protoboard but with no scope that's as far as it goes for me.
 
Ok, since no one cared to answer, or wasnt' around..

I am going with an IC based instrumentation amplifier with an ajustable gain from 1 to 1000. I image that should fit the bill nicely.

It is the burr brown INA103. Reason I chose this it will save space, available in both DIP and SOIC, and is adjustable with an external resistor. If anyone has a better alternative I'll be happy to hear about it.

Please don't start feeling left out because you don't have the model for it or whatever, I'll happily pass on any models required to simulate it in pspice. Of course this particular model should be available at texas instruments website as well.
 
Yep. Self oscillating has some serious advantages to be had, I wouldn't take em lightly. A free running Sigma Delta may not be the best way of going about it however, as it might end up being too fast for the components to handle very well. Why do you want to use a carrier based? I think it's alot harder to "properly" implement a carrier based, largely because of the difficulties in producing one that's good enough to want to use, and keeping it good right to the comparator.

I've used a 1Mhz crystal RC integrated to drive a 555 before....another five minute circuit ..I never tunned it on a scope either but I listened to it all night :) I only used one mosfet right off the 555 ...connected as a low side chopper. You may like to try something like that as well and compare two 5 minute circuits side by side, just for kicks.

I could be wrong but I think a rule of thumb you can go by is say 10X the cut off frequency. I'm sure someone will have a more scientific explanation though, but there's no reason why you can't just make it 350khz to 500khz which should also be sufficifient for high fidelity at full range. The faster the better until dissipation becomes a problem, that's a good simplistic rule of thumb.

If we had devices that handled power switching in the GHz range or more efficiently I kind of doubt we'd be using anything near 500Khz, noise not being a concern that is.

Have you taken a look at some of the other circuits posted in this thread? More on the way shortly too.
 
Ok, so now I have tried to simulate the UCD circuit, both with and without an extra noise-shaping loop filter. Attached are the two variants, both as .gif, and PSpice .sch.

For the basic UCD circuit, I took component values directly from the patent, where I could find them. For the rest, I've tried my best to calculate/guess to the best of my ability...
Please correct me where/if I'm way off!

The basic UCD circuit oscillates at ~327kHz, precisely as intended. However, looking into details, the rise/fall time of the output (before the filter) is about 250/280 ns. If you measure from the comparator outputs to the actual mosfet output, the rise/fall times are 340/360 ns.

Not surprisingly, the oscillation frequency drops when a loop filter is introduced. But by playing with capacitor values in feedback and loop filter, I could not get the frequency to come over 100kHz.

Therefore, my conclusion is that the discrete comparator and driver works good enough for the basic UCD circuit, but that they are not fast enough to allow much refinement of the control loop.

Having said that, I'm not quite sure where to go from here. The basic UCD in itself is intreaguing, and would serve as a good demonstration circuit, if nothing else. I just don't know what to expect in terms of sound quality from it...
(The patent only talks about frequency response and output impedance, nothing about THD measurements :))

Is there any point in making a PCB for this? I for one wouldn't mind trying it, just for fun if nothing else. The question is if it's good enough for the limited power "start here" reference design?

(P.s. Hope I'm not offending Bruno now - that is certainly not my intention!)
 
Hi, You are quick!

I just have the driver stage left on mine and I haven't yet implemented, or tried to, the second integrator.

THD should stay flat across audio band and see no harmonics up to the switching frequency (I think).

I'll finish mine first but play around with yours as well, then we can compare notes and make whatever refinements we discover will be useful.

We'll be comparing notes by tomorrow. When I try the second integrator I'll just go with the values Charles was nice enough to calculate and see what smokes.

The schottky may need changing to a double diode configuration as well.

Chris
 
classd4sure said:
I'll finish mine first but play around with yours as well, then we can compare notes and make whatever refinements we discover will be useful.
Great! I am very open to the possibility that things may look different if I've overlooked some improvement to my "intrepretation" of the circuit...
Btw., what better things are there to do on a saturday when the sun is shining outside? :D

/Johan
 
Ok,

I haven't yet done any more work on my circuit, but I did simulate Johan's.

My questions are:

What is an acceptable level of shoot through, both in terms of current and power dissipation.

Johan your circuit has the exact same look to the FFT as my old one once I optimised it more (my old one that is). Third harmonics. Originally the old circuit was perfectly flat..and I haven't yet been able to get it to revert back to that sort of behavior, though there is the possibility my simulations are now more accurate than they once were. Also the THD reading is near exactly what my old one is.

I'll get mine completed tonight and we will work on optimising.
I feel if we can optimise it as best we can in simulation, have someone build it (unfortunatly I'm unable to), and compare real world with simulation, it would be rather informative.

It's too bad it turned out so close to the exact ucd patent, I was hoping to move away from it somewhat, but it's hard to beat it for simplicity, and it does meet all design goals, while remaining intuitive as to its operation.

I think it would be nice to incorporate a second integrator loop and I think Charles calculated the values for us, but perhaps we should concentrate on optimising this version first?

Johan your implementation of the comparator works excellent. I'm hoping my second is better than the first. Soon to find out.
 
I have played around and enclosed the corresponding files. I increased the gain as well by increasing R13 to 10 k (if you want to keep the oscillation frequency the same you'll have to decrease C2 accordingly). Drive voltage was 1 V peak.
As you can see k2 is about 70 dB below desired output, k3 is around -80 dB and the rest around -90 dB.
These are not the best THD values around but: 1.) they don't say that much alone and are 2.) still very good and sufficient for many applications, 3.) better than some %&!@+:#-expensive stuff and 4.) show the favoured falling level for increasing order. Apart from that, they are just simulation values, nothing more - nothing less.

I played around with the gain a little and it shows a behaviour like less gain = less THD. This is expected since NFB is the reciprocal of the gain. So it might pay to use a linear low THD gain-stage in front of the UCD.

I also played around with the drive-voltage and it shows a behaviour of increasing THD with drive amplitude (a favoured behaviour). Nothing seems to indicate crossover distortion or the like.

The switching frequency was centered around 420 kHz with the shown dimensioning. It is important to use a so called LAG filter to increase the loop gain and not a plain integrator, otherwise you will encounter the drop in switching frequency Johan encountered.
The secret lies in the resistor R35. It is possible to achieve the same behaviour with an integrator AND an additional summing stage. But I think no one complains if part-count is kept low. There is still a drop in switching frequency when the LAG filter is introduced but never ever as much as if an integrator is used.

Regard

Charles
 

Attachments

  • ucd.zip
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Hey Charles, I noticed that you are using 200nF for C1 (the output filter cap). So our simulations are not quite comparable. I took the values directly from the UCD patent, for a cut-off freq. of 35 kHz w. 6ohm load, yielding C1=680nF. (The oscillation frequency drops when C1 is increased)
But the loop gain also differs - if you increase your R13, you can "compensate" for a larger C1 :)

Could you explain the idea with the LAG filter? What is it's purpose and function?
I have studied the function (noise shaping) of n-th order integrators in this kind of loop, but it's not transparent (to me) how this compares to that LAG-filter.

Regards / Johan
 
I took the values for a 60 kHz filter. That's the reason why I took 200 Nanofarads and why there is quite some carrier residual.

My lag filter is dimensioned to achieve more loop gain in the audio range. I.e. it has a gain of about 5 up to 20 kHz where it starts to drop. At about 100 kHz it is returning to "flat" again. So there is much less influence on

1.) oscillation frequency and

2.) phase shift within the loop at audio frequencies

compared to the usage of an additional integrator in the forward path of the loop.

This was just a simple try and things could of course be improved by an indepth analysis.

If you increase the order of a delta-sigma loop you usually add an integrator and a summing stage (or sum its output into an existing summing stage). For a single added order, the lag filter does the same.

Regards

Charles

Edit: Forgot to mention: In the FTT the main peak to the left is the wanted signal, the next one is the 2nd harmonic followed by the third one.
 
I have now built the UCD circuit on a proto-board. Unfortunately, but not very surprisingly, I have not got it to oscillate by itself yet. (With the input connected to ground.)
This is because it is not "DC-stable" towards the positive rail. When I turn on my power supply, the comparator wants to make the output "high". But since the floating supply to the upper driver is made by a diode+capacitor, that driver can't hold the output high for very long. (Even though I have 22uF there now!)
For some reason then, it never manages to start oscillating. (Perhaps due to the way the voltages are ramped up.)
Once I got it oscillating by very briefly shorting the output to Vcc. Looked nice, but the second or third time I did it, I blew something :(

Thought I'd mention this, so you guys can help think about the DC-stability as well. (General DC/overload stability is likely to be a problem for most N-channel only designs (?))

/Johan
 
johanps said:
I have now built the UCD circuit on a proto-board. Unfortunately, but not very surprisingly, I have not got it to oscillate by itself yet. (With the input connected to ground.)
This is because it is not "DC-stable" towards the positive rail. When I turn on my power supply, the comparator wants to make the output "high". But since the floating supply to the upper driver is made by a diode+capacitor, that driver can't hold the output high for very long. (Even though I have 22uF there now!)
For some reason then, it never manages to start oscillating. (Perhaps due to the way the voltages are ramped up.)
Once I got it oscillating by very briefly shorting the output to Vcc. Looked nice, but the second or third time I did it, I blew something :(

Thought I'd mention this, so you guys can help think about the DC-stability as well. (General DC/overload stability is likely to be a problem for most N-channel only designs (?))

/Johan

I would have thought once it floated high the feedback loop would have forced the output low again...Did you try it with any audio input yet? Maybe a good way to fix that from happening would be to add another feedback loop from before the coil, what do you think?
 
Hi,

I have tried several different transistors for the comparator portion of the amplifier. Some "pre driver" types with high beta that hardly worked at all, currently BC559C and BC549C's which work well but have an ugly ring to them.

Long story short, I haven't been able to find a better pair than the 2n2222 and 2n2907a, they really do have a nice clean switch!

The only other part of my circuit which differs from the others in any way at all is the output mofsets, for which I've selected IRF540's for no other reason than I thought I had a pair.

It seems though that what I do have here are IRF511's (YUCK) so I'm going to redo it with those and try to throw it together on a protoboard because it's time I heard this thing!

I was thinking maybe the best way to get it oscillating is just kicking it at power up, but I'm not sure what the best way of doing that would be either (hold the button down and turn the crank), waiting for more sugestions before I look into it.
 
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