CFA Topology Audio Amplifiers

I think simplicity is important in this forum because it aids board layout and construction. More members are likely to build a design with less parts.

Best wishes,
Ian

If it's simplicity you want, then you can hardly do better than use one of Douglas Self's designs, with independently biased amplified negative feedback current sources for the input stage and the second stage and without his SOA protection, which is flawed.
 
It has been argued that for similar output stages, CFAs have less active devices than VFAs and are simpler.
Let's count them for two comparable configurations.

CFA

diamond input stage : 4 bipolar transistors
buffer of the VAS : 2 bipolar transistors
VAS : 2 bipolar transistors
Sum : 8 bipolar transistors in all.

VFA
We may consider Constant Current Sources as high values resistors (in fact they are high output impedance devices) and being passive rather than active devices (this may be a little specious but see further). Then :

differential + current mirror input stage : 4 bipolar transistors
input buffer of the VAS : 1 bipolar transistor
VAS : 1 bipolar transistor
Sum : 6 bipolar transistors in all.

If the CCS are considered are active devices, we add 3 bipolar transistors (one for the voltage reference). The number of bipolar transistors is now 9 in all, just one more than for the VFA above.

However, with a circuit using CCSs, the quiescent currents through the active transistors which determine their gm are settled independantly of their own characteristics and we do not have to check them.
This undoubtedly simplifies the controls once the circuits are mounted.
Another issue for comparison I believe is that the CFA is symmetrical.
So, to compare both equally, wouldnt you have to make the VFA symmetrical too?
 
Mooly,
I have seen one sentence so far that I won't bother to quote here as it becomes obvious that some people just have some kind of personal animosity towards specific others here. Instead of closing the entire thread could you not just ban the people who seem not able to stick to the subject without personal attacks? This is an important subject to some of us and I would hate to see the thread come to a premature ending because of a few bad apples. I understand we have all agreed to follow the forum rules and that should be where the action should take place, at least that is my personal opinion. Now back to the real discussion.
 
If it's simplicity you want, then you can hardly do better than use one of Douglas Self's designs, with independently biased amplified negative feedback current sources for the input stage and the second stage and without his SOA protection, which is flawed.

Agreed, that's why the blameless is so popular around here. Incidentally, with decent transistors (low Ccb), little is to be gained from separate current sources.

Unfortunately, most blameless amps on this forum wont exhibit the desired performance, since, very little attention is paid to induction from supply wiring/conductors. There is a considerable amount of practical skill/knowledge required to get the perceived theoretical performance of the schematic.
 
myhrrhleine,
I don't understand the comment about the cfa having to be a symmetric design? I did not think that this was a requirement of the topology though it could be used. If you can use a simple ips section why would this require symmetry?

ihan,
I understand the fact that many do like the D. Self Blameless amplifier designs but how are those final circuits considered simple? From what I have observed these circuits are fairly sophisticated and not exactly minimalistic or simple in final configuration, could you explain what you term a simple circuit?
 
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So-called "CFAs" with complimentary common-emitter input stages are visually but not electrically symmetrical: you're very unlikely to obtain matched pnp-npn transistor pairs.

Hi Mike,
I was about to say exactly the same.
I saw such a remark thirty years ago and it always remains in my mind.

*

To me, simplicity relies in the lack of adjustments. Remember that it was the fundamental philosophy which presided over the birth of the Quad 405.
 
So-called "CFAs" with complimentary common-emitter input stages are visually but not electrically symmetrical: you're very unlikely to obtain matched pnp-npn transistor pairs.

I disagree. I am fortunate to have access to a Keithley 2612B sourcemeter. I have spent a couple of weekends measuring input and VAS transistors at operating voltage and current for future builds. I have a sizable collection of characterized transistors. I can create matched pairs at various hfe.

The process of matching transistors could be automated to be performed at the wafer if any manufacturer cared. I bought some supposedly matched pairs of NTE transistors and they we so mis-matched as to be laughable.

I built a VSSA from tightly matched pairs. The offset was very small without any need for balancing.
 
Another issue for comparison I believe is that the CFA is symmetrical.
So, to compare both equally, wouldnt you have to make the VFA symmetrical too?

Actually this is a good point worth considering. I am a strong believer in the push-pull VAS. In fairness to the CFA, there is a moderate amount of additional complexity added to the VFA for one with a push-pull VAS, whether it is done with a complementary differential input stage or with a unipolar input stage one of whose differential outputs is reflected (or whatever) to drive the "other side" of the VAS.

Bottom line, if you insist on a push-pull VAS, the CFA will likely be simpler. This is not necessarily to say that the CFA's performance will be as good as the VFA in this case.

Another consideration of preference is that of JFET input stages. I like them. Given the relative unavailability of good input stage P channel JFETs (not to mention pretty terrible matching to their n-channel counterparts), I'm not sure how one would make a practical symmetrical CFA with JFET inputs.

Cheers,
Bob
 
I disagree. I am fortunate to have access to a Keithley 2612B sourcemeter. I have spent a couple of weekends measuring input and VAS transistors at operating voltage and current for future builds. I have a sizable collection of characterized transistors. I can create matched pairs at various hfe.

The process of matching transistors could be automated to be performed at the wafer if any manufacturer cared. I bought some supposedly matched pairs of NTE transistors and they we so mis-matched as to be laughable.

I built a VSSA from tightly matched pairs. The offset was very small without any need for balancing.

Matching for distortion cancellation (in particular at HF, where it really matters) means much more than matching the DC parameters.

PNP and NPN devices are fundamentally mismatched. No device design or sorting would render matched PNP/NPN devices that would provide any significant distortion cancellation, other than perhaps at LF. You can find the reasoning beyond this in any electronic devices physics book.

PNP and NPN devices are manufactured on fundamentally different materials and process flows. No discrete devices manufacturing process will have PNP and NPN devices on the same silicon wafer. What you can get as PNP/NPN pairs in the same IC style case is actually a multi chip assembly build.
 
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PNP and NPN devices are manufactured on fundamentally different materials and process flows. No discrete devices manufacturing process will have PNP and NPN devices on the same silicon wafer. What you can get as PNP/NPN pairs in the same IC style case is actually a multi chip assembly build.


In IC mfr'ing that is no longer true. The process to make true compliments can be made and are made in IC for awhile now. However, it is true that we don't have access to them as individual parts/transistor pairs. No money it, no doubt. So, for the DIY'er, its still hand matching/testing. Obtaining a matched pair is easier with some devices than others... some are just closer as compliments. When you need to be really close, a curve tracer is good enough for most anything ($250, new).

Th-RNMarsh
 
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In IC mfr'ing that is no longer true.

Yes it is. IC PNP/NPN complementarity went a long way from the vertical NPN - lateral NPN era, but even the todays' most advanced bipolar processes can't provide PNP/NPN true matching, at the same level as NPN/NPN or PNP/PNP matching, which e.g. provides 2nd harmonic cancellation in differential pairs loaded with a current mirror.

You won't find any linear IC that relies only on PNP/NPN matching to improve open loop linearity. There are other techniques for that, here's an example.
 
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Joined 2012
Actually this is a good point worth considering. I am a strong believer in the push-pull VAS.
Bottom line, if you insist on a push-pull VAS, the CFA will likely be simpler. This is not necessarily to say that the CFA's performance will be as good as the VFA in this case.

Another consideration of preference is that of JFET input stages. I like them. Given the relative unavailability of good input stage P channel JFETs (not to mention pretty terrible matching to their n-channel counterparts), I'm not sure how one would make a practical symmetrical CFA with JFET inputs.

Cheers,
Bob

Hi Bob,

The symmetrical configuration was derived from the tube era to transistor era transition as follows: The compound-complementary stage was popular and transistors designers took it up. I added the direct-coupled push-pull to it and created the Push-Pull Compound-Complementary form... as was first shown in published form in 3/1980 of TAA.

The basic 4 transistor configuration used unmatched complemenets and no CCS. But still managed -3dB at 600KHz and under .01% at 2v -- for a line stage. When I matched the devices I got well under .002% ... my limit at the time. Both with the same 15dB of NFB. Using same topoloigy but with JFETs, I can now measure -120dB HD at 1v into a real load - a headphone. (Its a headphone amp).
-- without cascoding. You cant get simpler than that.

Note also that the C of the g-d or the c-b in this configuration helps cancel C caused distortion.

Thx-RNMarsh
 
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The basic 4 transistor configuration used unmatched complemenets and no CCS. But still managed -3dB at 600KHz and under .01% at 2v -- for a line stage. When I matched the devices I got well under .002% ... my limit at the time. Both with the same 15dB of NFB. Using same topoloigy but with JFETs, I can now measure -120dB HD at 1v into a real load - a headphone. (Its a headphone amp).
-- without cascoding. You cant get simpler than that.

Again, I completely agree with your findings. :up: