BPA200 / Stereo Bi-wire PCB V1

[pacificblue]

Having looked at U5 I think now I have it sorted it?

Looks better. Still, a Design Rule Check with a PCB design software would be a safer method of making sure, there are no further mistakes.

As for Ci for 4 channel operation is it ok to use an electrolitic as a 22uf Polyester/Polypropylene would be quite large.

Ci is usually an electrolytic.

Or in the LM3886 doc on page 21 (applicaition information continued)
use the caluclated ratings suggested there

Ci = 4.7uf
Ri = 8.2k
Rf1 = 100k

Another possible solution with the drawback that you have to adapt all other resistors and capacitors to those values. E. g. RA3 = 10*Rf1, Ri = Rb, etc.

 

[AndriyOL]

Hi pacificblue,

Sorry for intervene.
Do you know what type of capacitor is better for supply bypassing - 0.1uF ceramic or polypropylene?
It seems like National didn't clarify itself yet. Their datasheet stands up to 1192 appnote.
Is it possible when two chips (non-isolated packages) with one PSU mounted on single heatsink without isolation washers interact between each other and one of them will more likely produce extra DC offset?

Thanks.
Regards.

 

[pacificblue]

Ceramics are better for supply bypassing. The people at National know that, too:

From DS011833 Datasheet for LM3886 (National Semiconductor, October 2003), page 19, chapter "Supply Bypassing"
These instabilities can be
eliminated through multiple bypassing utilizing a large tantalum
or electrolytic capacitor (10 µF or larger) which is used to
absorb low frequency variations and a small ceramic capacitor
(0.1 µF)...

The heatsink tab has the same potential as pin 4, therefore connecting two ICs through the heatsink is no different from connecting them through pins 4. Different DC offsets are due to component tolerances.

 

[AndriyOL]

Ceramics are better for supply bypassing. The people at National know that, too:


The heatsink tab has the same potential as pin 4, therefore connecting two ICs through the heatsink is no different from connecting them through pins 4. Different DC offsets are due to component tolerances.

At page 6 of appnote 1192 at the end of this page National says: "To obtain the highest quality amplifier, polypropylene capacitors should be employed in the signal path and supply bypassing". Strange but it contradicts to datasheets of 4780 and 3886.

I have used 0.1% tolerance resistors, than change them to others manually matched resistors to 0.1% of tolerance, however it doesn't help. The offset differences between two amplifiers in single package reach to 13mV.
Maybe it's because I also have some AC voltage (light 50Hz hum) in the circuit which can be heard close from speakers. Once I was able to measure it from heatsink and chassis near 70-80VAC.

 

[AndrewT]

The tight tolerance resistors set the gain.
The input offset current in combination with the source resistance sets the output offset voltage.

 

[AndriyOL]

The input offset current in combination with the source resistance sets the output offset voltage.

Not only input offset. I use input coupling capacitor. Hence, it can be neglected.

 

[AndrewT]

the input offset current is inherent to the input stage of the amplifier, whether discrete or opamp or chipamp.
That input offset current will create an output offset.
Manufacturers of instrumentation opamps try to minimise that offset current which in turn minimises the output offset, but that adds complexity to the circuitry that is not usually required for audio.

Adding a DC blocking cap does not in any way change the input offset current.