Bob Cordell's Power amplifier book

The baseline seems to be the problem, at least can I confirm that for the "think model" of impedance symmetry between the inputs.
In the simple conceptual model below (ULGF around 600kHz, V4 ensures small sim step), one gets lower THD, if R2 and R8 at non-inverting input are scaled down. I have also checked that e.g. collector voltages of Q1 and Q2 remain in balance after that change.
In my amp with much less distortion, this does not hold. Best performance is achieved with balanced impedances.

Sorry for the noise and any trouble, Damir.

Cheers,
Matthias

You realize that the Thevenin source impedance is the combination of R2 and R8, and therefore any large value for R8 has very little effect on the effective source impedance?
 
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I would be pleased to send you $10.00 towards the purchase of Self's book. Anybody else?

Do you have anything better to say than wise *** comments; I see them toward
many different members here and really, they are not that clever or entertaining.
You have no idea what is already in my technical library.
Why don't you just send me the book?
 
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I would be pleased to send you $10.00 towards the purchase of Self's book. Anybody else?

As a matter of fact, you've done this before here:
http://www.diyaudio.com/forums/soli...lls-power-amplifier-book-806.html#post4952477
and:
http://www.diyaudio.com/forums/soli...lls-power-amplifier-book-806.html#post4953090

I bought everything that Linear Audio has to offer and after reading this in Kolinummi's book, showed
that he was wrong in his analysis further back in this thread - I didn't bother to read the rest of his book:

Bob, have a look at the Kolinummi power amp book {sold on the Linear Audio website} pp. 232-233 and especially Fig 7.36
The simplified schematic used by Canadian manufacturer Bryston is presented in Figure 7.35. This circuit has some gain which is set with resistors R1 and R2. The transistors in the circuit remain forward biased at all times and the circuit can be thought of as non-switching even if transistor currents may go close to zero. Linearity also remains good at high frequencies and the mentioned problems of the conventional CFP are avoided.

The simulated power device currents of the three output stages discussed [CFP, EF, Bryston] are plotted in Figure 7.36. [CFP is poopy, EF is slightly less poopy] and the Bryston topology has a very wide and smooth transition.

 
I bought everything that Linear Audio has to offer and after reading this in Kolinummi's book, showed
that he was wrong in his analysis further back in this thread - I didn't bother to read the rest of his book:

@Mark Johnson:
Further, you missed Kolinummi's error and suggested that it was a good book - you were wrong.
Seems you enjoy collecting books.
 
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Damir, can you explain or provide a pointer to a post describing: How does one separate these both contributions in a simulation experiment, distortion due to unbalanced impedances and distortion due to nonlinear voltage-drop across a resistor at the non-inverting input?

Thanks,
Matthias

If you take the "output" for the FFT at the base of the non-inverting input then you
will measure the distortion due to the non-linear input current or input impedance alone.
 
Matthias, balanced impedances are good for distortion performance of the differential pair, but not important in this discussion about input distortion.
I just want to be sure if Self is correct, and in mine opinion he is.

My understanding is that you want to match the DC path resistances at the two inputs
so that the finite base current produces the same voltage drop across those path resistances.
This maintains the idle match in Ic (balance) for the diff pair assuming they are also matched
for Vbe and beta as they would be in simulation.
I've never read about any other reason to keep those path resistances matched - anyone?
 
I've never read about any other reason to keep those path resistances matched - anyone?
Hi Pete,

Please have a look at Super TIS fig. 5 and the text just above fig. 6. If I alter the value of R1, thus introducing an unbalance, the distortion does increase (at least according my simulation). But this does not happen if I zeroed all the capacitances of the input transistors. So I concluded that the distortion increase is due to the (nonlinear) Miller effect.
Not sure if this applies to other input configurations, of course.

Cheers, E.
 
Hi Pete,
If you take the "output" for the FFT at the base of the non-inverting input then you
will measure the distortion due to the non-linear input current or input impedance alone.
my impression is that we are running into trouble due to "weakly defined terms". I always understood, and maybe Douglas Selfs's definition is another one, that this input distortion is something additionally to the other contributions.
If one follows your suggestion, then this is too pessimistic in my understanding. Measuring the same at the inverting input will also reveal distortions, which partially cancel at the summing point feeding the "VAS" input.
But as I said: perhaps we are speaking about different things.
I will withdraw from this -- interesting and difficult -- discussion until next year, as I'm moving to an Internet free zone for some days.

Kind regards,
Matthias
 
My understanding is that you want to match the DC path resistances at the two inputs
so that the finite base current produces the same voltage drop across those path resistances.
This maintains the idle match in Ic (balance) for the diff pair assuming they are also matched
for Vbe and beta as they would be in simulation.
I've never read about any other reason to keep those path resistances matched - anyone?

I learned to keep both input impedances the same (whenever possible) while working at National (from Mr. Pease).
 
Hi Pete,

Please have a look at Super TIS fig. 5 and the text just above fig. 6. If I alter the value of R1, thus introducing an unbalance, the distortion does increase (at least according my simulation). But this does not happen if I zeroed all the capacitances of the input transistors. So I concluded that the distortion increase is due to the (nonlinear) Miller effect.
Not sure if this applies to other input configurations, of course.

Cheers, E.

Thanks Edmond, I'll have to study that in some depth.
I've always blamed the nonlinear Miller capacitance for increased distortion at HF with
higher source impedances but never noticed a balance effect - interesting.
 
Keeping the differential source impedances the same can improve PSRR if the LTP is not cascoded. But other than that, and DC offset effects, the linearity gained from optimizing differential source impedances is usually only fractional and not necessarily worth designing the circuit around.

After all, if it matters that much you can just add buffers to your LTP. I don't know why this seems to have gone out of favor, but it does help enormously with the robustness of a BJT input amp. All the chips do it, why not us. :confused:
 
After all, if it matters that much you can just add buffers to your LTP. I don't know why this seems to have gone out of favor, but it does help enormously with the robustness of a BJT input amp. All the chips do it, why not us. :confused:

I just sim LTP input with buffer several days ago and yesterday (different topology) and then read this.

But my purpose was to get high input impedance and high slew rate. I can set LTP current high enough.