Bob Cordell Interview: BJT vs. MOSFET

Nico Ras said:


For all those fans out there building clones, you could save a small fortune not having a 1 KVA transformer to heat up the transistors as well as massive heatsinks to prevent them from setting the furniture alight.

Heh, heh ... But one day you'd want to throw a party with several pairs of relatively inefficient, current hungry speakers (like ATC SCM100s) in parallel. I assure you that big heatsinks and massive toroids have their place under the sun :D
 
Nelson Pass said:


I will spare you my further involvement.

:cool:


Hi Nelson,

I did not think that your comments were the least bit off-topic or in the nature of trying to drag the thread in another direction. I, and I am sure the great majority of the other readers, welcome and enjoy your involvement. I am personally honored that you participate in this thread.

Bob
 
JPV said:
Hi andy_c

I looked at your thread and have seen your graphs.
This is great. It seems that a simulation ( yours), a calculation ( Oliver) and tests ( Self) are showing the same trend.

My question is about your graph: why is the trend at high current not R=0,22 because hib ( 1/gm) is then very low?
Seeing this in linear scale is also surprising. What I said on narrow window doesn't make sense.

Mr Cordell

I understand of course the thermal dynamic problem. I though I showed my concern. A question is : is the thermal lag effect creating a lot of "transient distortion" ? What is the weigth of this effect in the overall aural perception?


Mr Pass

I have VERY good burgundy in my cellar in Brussels. If you ever PASS by you are welcome :cool:

JPV


You have posed a very, very good question. We should always connect all the dots and close the loop on all of our well-intetioned hypotheses, yet unfortunately we often don't or can't. Although I have measured the dynamic thermal effect on bias, I have not done a transient THD or transient twin-tone distortion test to be able to put a number on the objective result. I don't think its an easy thing to do, but maybe someone here has done it. Similarly, while I and others hypothesize that a temporary under-bias situation may cause pretty serious crossover distortion, we really don't know (at least I really don't know) that the effect is all that audible.

Bob
 
Bratislav said:


Heh, heh ... But one day you'd want to throw a party with several pairs of relatively inefficient, current hungry speakers (like ATC SCM100s) in parallel. I assure you that big heatsinks and massive toroids have their place under the sun :D


Not if you are using four 15 Hz Horns, 15 watt will blow you away, but still I use 4 down biased KSA50s running only hot when I irritate the people in the next village.

:yawn: :cloud9:
 
Andy-c

Can you do a run where you change Io the bias current like you did but you change also the Rc ( emitter resistor) in order to keep Rc x Io = 26mV.
Thanks

M; Cordell

This transient thermal effect can perhaps be done rather easy.

If you use thermaltrack transistors mounted in push pull with a normal vbe multipler but not using the diodes on chip.
Then, you can apply a stable signal to the amplifier but pulse short high power bursts in the diodes. This will heat the chip in a transient way with respect to the main signal. By using a low duty cycle it must be possible to see the distortion induced if you have good instruments.

By using the push pull stage (perhaps with a driver in the loop) with the LM4562 (low distortion) you can include or remove a resistor R between the + and - of the LM4562 and decrease or increase the loop transmission so the distortion without changing the gain. I would do it with an inverting configuration to avoid common mode.
The loop transmission is a(s) (R //R1)/(R2+R//R1) and gain remains R2/R1 whatever R not to low
By coupling this with pulses on the diodes and listening to it it is perhaps possible to hear the effect of crossover distortion and dynamics. I dont'have yet the set up to do this but I will in the futur and will do it

What do you think?

JPV
 
Hi,
it appears we are worried more about under-biasing than over biasing in our push pull arrangements.

The window of adjustment seems to be 15 to 25mV across the individual Re.

What if one were to set the "normal" bias to near 25mV and accept that when cold it will be slightly overbiased, but more importantly when the output die is cooling after a high power burst the Re bias voltage is allowed to drop to near 15mV, then we stay in the near optimum bias window.

Is it possible to scale the sinks and Re and number of output devices to achieve something like this set-up?

Then, there would be no argument about whether post burst under-biasing is audible or not (hopefully there would be no under-biasing).
 
JPV said:
Andy-c

Can you do a run where you change Io the bias current like you did but you change also the Rc ( emitter resistor) in order to keep Rc x Io = 26mV.
Thanks

M; Cordell

This transient thermal effect can perhaps be done rather easy.

If you use thermaltrack transistors mounted in push pull with a normal vbe multipler but not using the diodes on chip.
Then, you can apply a stable signal to the amplifier but pulse short high power bursts in the diodes. This will heat the chip in a transient way with respect to the main signal. By using a low duty cycle it must be possible to see the distortion induced if you have good instruments.

By using the push pull stage (perhaps with a driver in the loop) with the LM4562 (low distortion) you can include or remove a resistor R between the + and - of the LM4562 and decrease or increase the loop transmission so the distortion without changing the gain. I would do it with an inverting configuration to avoid common mode.
The loop transmission is a(s) (R //R1)/(R2+R//R1) and gain remains R2/R1 whatever R not to low
By coupling this with pulses on the diodes and listening to it it is perhaps possible to hear the effect of crossover distortion and dynamics. I dont'have yet the set up to do this but I will in the futur and will do it

What do you think?

JPV

This is an interesting suggestion, but I may be mis-understanding a part of it. It sounds like you want to heat the power transistor die on a controlled transient basis by running current through the ThermalTrak diode to cause heating via power dissipation in the diode. Is that correct? If so, can the ThermalTrak diode handle the needed amount of current and dissipation?

Bob
 
M Cordell


That is correct. Of course the diodes must handle the power and this is perhaps the problem because they are not intended for that, on the contrary they should not heat the chip in normal operation!. The duty cycle in the bursts is to add energy in a controled way ( perhaps burst of bursts) to the chip and make the distortion if any periodic for the spectrum analyser.

JPV
 
JPV said:
Andy-c

Can you do a run where you change Io the bias current like you did but you change also the Rc ( emitter resistor) in order to keep Rc x Io = 26mV.
Thanks

I'm not exactly sure what you mean by this. I'm thinking you mean that several different circuits should be tried - say with 0.1 Ohm, 0.22 Ohm and 0.33 Ohm emitter resistors, each one with a bias voltage of 26 mV across the emitter resistor. Is that correct?

At any rate, here's a comparison of FET, BJT and Bob's error corrected FET output stage. Bob's amp is biased with 150 mA in the output stage, so I also used that for the bias of the simple FET output stage. This is to show the improvement with error correction while keeping the bias constant. For the BJT, I used Self's optimum bias of 107 mA for a 0.22 Ohm emitter resistor. This post shows the schematic with one swept current source and three current-controlled current sources, each of which drives one circuit's output.

The idea is to sweep the output current, then look at a graph of the derivative of output voltage with respect to current (incremental DC resistance) for each circuit
 
Nelson Pass said:
What value Source resistance was used on the FET stage?

All configs had 0.22 Ohms source or emitter resistor.

It finally hit me what the reason for the "kinks" was in the FET curve. The models assume the textbook equation:

Id=K*(Vgs-VT)2 for Vgs>=VT

and Id=0 for Vgs<VT

The first expression has second derivative 2K everywhere while the second has second derivative 0 everywhere. So at Vgs=VT there's a discontinuity in the second derivative. Better models are needed to prevent this.
 
andy_c said:


Ihere's a comparison of FET, BJT and Bob's error corrected FET output stage.

Andy, thank you for the information. I found your comments on the Spice MOSFET models very important.

What an interesting thread this is. I did not look or post at Diy Audio for most of the last year after moving home. Now I came back and have so much to read. However in this thread I would like to add to the discussion my personal favorite circuit idea I've designed in 1992 and used in my power amplifiers designs for Creek Audio for 10 years after that. It is a very symmetrical N-channel output.

I found that other designers in this thread dismissed any "quasicomplementary" outputs as inferior. I would like to challenge this conclusion and show that there is a good chance for an "N-channel only" output to be better (and more symmetrical) than a complementary one.

The attached circuit in simulation gives following results: output impedance v output current for 150 mA idle varies from 0.2 to 0.15 Ohm over +/- 1A range, with a completely symmetrical change for a positive and negative halfs. I had to use the models from the basic LTspice set - I am avare of their inadequacy for a linear simulation, and if you can try it using some better models - please do.

This circuit used with modern LL vertical MOSFETs is a very simple and a very good sounding solution for hi-fi audio applications.

Alex Nikitin