john curl said:
Dear John,
Following all these observations, would it be safe to say that a Class AAB amplifier with relative high bias current, say to run 10 watt class A and exceeding that running Class B is undesirable and one should either run full class A or class B with very little bias, or am I missing the point completely.
Kind regards
Nico
Bob,
earlier in the thread you were mentioning running 200 mA at least through the output devices. In order to achieve the 15 mV drop across RE it would be in the order of 0.02 Ohms. The PCB track would probably be close to this value alone.
Again I may be missing something here.
Kinde regards
Nico
earlier in the thread you were mentioning running 200 mA at least through the output devices. In order to achieve the 15 mV drop across RE it would be in the order of 0.02 Ohms. The PCB track would probably be close to this value alone.
Again I may be missing something here.
Kinde regards
Nico
Hi, Nico,
JC's trick is to maintain the RE drop at about 15-25mV. Say with a certain RE value, it gives only 2W of classA operation/pair.
How to get 20W of classA operation? (Say max rating is 200W)
JC does not increase the 15-25mV drop over RE (increasing bias for each pair of output transistors), but instead he multiply the number of output transistors (each still biased 15-25mV around it's RE).
10 pair (each gives 2W) will result in 20W classA total for that amplifier.
lumanauw said:
This is just porportionally increasisng the overall quescient current using several devices if 20W class A operation was the objective in the first place.
What makes 15 mV magical. What if it were a class AB amplifier with a single pair of output devices, is 15 mV still optimal?
Biasing an amplifier for 2W class A or 20W class A results in no improvement in measured (no simulated) cross-over distortion.
Kindes regards and I wish you all a prosperous new year.
Nico
Nico, without the math, I cannot prove to you why 15-25mV. Apparently there is no absolute answer, but just a best fit. It took a computer simulation to get the answer at first. I design class AB amps with .5 to 25W of class A operation, and 100-400W into class AB at 8 ohms. The same design rule works for all of these amps.
Hi Bob,
are you the person to answer that question?
As an aside, Borbely promotes at least 100mA per FET pair and 500mA for the complete set of paralleled pairs.
D.Self spends a lot of time in his book discussing his research results on this BJT bias and comes out with a very similar recommendation.
Bias by voltage and not current.
His precise voltage bias varies with Re.
He calls his biassing method ClassB, even though it equates to most others' understanding of push pull ClassAB.
are you the person to answer that question?
As an aside, Borbely promotes at least 100mA per FET pair and 500mA for the complete set of paralleled pairs.
D.Self spends a lot of time in his book discussing his research results on this BJT bias and comes out with a very similar recommendation.
Bias by voltage and not current.
His precise voltage bias varies with Re.
He calls his biassing method ClassB, even though it equates to most others' understanding of push pull ClassAB.
Dear John,john curl said:
I am pleased with your answer. There may not be a simple rational explanation, and is something you gained from years of experience which is probably more worth than trying to find an algorithm that most likely fit the theory.
I applaud you for sharing knowledge based on your experience.
It is like baking a cake, adding a pinch of salt resulted in everybody loving it, two pinches were too much and half a pitch to little, even if there is no definition of a pinch.
Kindest regards
Nico
Bob Cordell said:
I always figured the better approach would be to let the rail caps be small enough that they cannot provide enough short-term energy to damage the output devices and to use an AUC integrator to drive the I/V limiter in a series regulator (presumably an AC reg to limit dissipation).
How has your experience with that approach been, if you have tried this?
AndrewT said:
Reread the explanation. A series regulator. That implies a reservoir before the regulator, preferably a large one. So the use of a small cap after the regulator is not a problem. There is no problem with reactance between the first and second cap, thanks to the regulator.
In short, the suggestion is not reducing the total capacitance. It is doing the short-circuit protection by careful selection of an additional capacitor, and handling the long-term (area-under-curve) protection at the regulator by e.g. controlling how much energy can be deposited in said capacitor in a given amount of time.
Of course, choosing the cap too small to match the AUC bits may cause sagging, and a too large value may compromise protection, hence the "careful selection" qualifier. HTH.
gerhard said:
For high voltages, there are any number of MOS that will do, yes.
I think this problem might go away eventually, though, when the practice of embedding a cascoding lateral SiC power JFET in the chip becomes more common. Last thing I heard, blocking voltages had reached 2.6kV for MOSFET and 1.8kV for JFET, with 3.3kV expected soon for the latter.
I doubt there is any good reason why you couldn't do the same thing that SiCED is doing with a BJT instead of the MOS device, except they aren't looking to make anything but switching devices so far.
John,
I will probably be burnt at the stake for writing this.
A few years after living with a KRELL glowing in the dark, I decided one day to turn the bias right down to a sensible 120 mA per device to see what would happen. Nothing happened except my electricity bill reduced. I could not hear or measure any significant difference.
I doubt if I am the only one out there that cannot leave anything alone but since turned the bias up and down on several occassions, each time thinking that it might have sounded better previously. I can assure you it never did.
Earlier today, I tried your rule of thumb and turned the bias down to the proverbial 15 - 25 mA. No audible difference. I do not have any test equipment apart from a scope and DVM at home to verify that nothing else had gone totally out of specification but will confirm this when I am back at the office after 07/01.
An observation was that the amp does not maintain 15mA, but drifts up and down between 12 mA and 18 mA depending upon the direction that my oscilating fan in the workshop was blowing.
This brings me to further question, at what ambient do you set the bias current. In summer our temperture ranges between 30 - 42 degrees centigrade.
For all those fans out there building clones, you could save a small fortune not having a 1 KVA transformer to heat up the transistors as well as massive heatsinks to prevent them from setting the furniture alight.
Kind regards
Nico
I will probably be burnt at the stake for writing this.
A few years after living with a KRELL glowing in the dark, I decided one day to turn the bias right down to a sensible 120 mA per device to see what would happen. Nothing happened except my electricity bill reduced. I could not hear or measure any significant difference.
I doubt if I am the only one out there that cannot leave anything alone but since turned the bias up and down on several occassions, each time thinking that it might have sounded better previously. I can assure you it never did.
Earlier today, I tried your rule of thumb and turned the bias down to the proverbial 15 - 25 mA. No audible difference. I do not have any test equipment apart from a scope and DVM at home to verify that nothing else had gone totally out of specification but will confirm this when I am back at the office after 07/01.
An observation was that the amp does not maintain 15mA, but drifts up and down between 12 mA and 18 mA depending upon the direction that my oscilating fan in the workshop was blowing.
This brings me to further question, at what ambient do you set the bias current. In summer our temperture ranges between 30 - 42 degrees centigrade.
For all those fans out there building clones, you could save a small fortune not having a 1 KVA transformer to heat up the transistors as well as massive heatsinks to prevent them from setting the furniture alight.
Kind regards
Nico
AndrewT said:
Sure, I'd be happy to.
The simplest protection circuits for an output stage use a current limiter (clips the signal at a certain maximum current through the transistor) or a linear foldback limiter (clips the signal at a maximum current which varies with the voltage drop over the transistor).
However, this instantaneous interaction can (and often will) have deleterious effects on the signal, and can throw the feedback loop out of whack etc..
It also does not take into account that there is a time component: the output transistors can deal with a peak well in excess of their usual operating power, as long as it is short. How much in excess and how long it can last depends on stuff like how quickly the heat from that pulse gets spread across the chip and finally transferred to the heat sink.
AUC (area under curve) refers to the power over time (energy). By limiting the energy in a given amount of time, rather than just clamping it to the DC safe operating area, you can allow greater peaks before clipping occurs.
By using a power supply which has a series regulator in it, you can move this protection circuit to the power supply instead, which has the added benefit of also protecting it from internal short-circuits et cetera.
After the series regulator, you have a small capacitor with a carefully chosen value which will handle the peaks without holding enough energy to cause damage to the transistor.
So, the capacitor holds enough energy to service the legitimate peaks, and the regulator charges this capacitor at a rate which does not allow the output stage a greater AUC than it can handle, nor allows the regulator itself to be overloaded.
Sometimes I'm no good at explaining, but I hope this was clearer.
Hi,
thanks for that explanation.
Seems to be the same as JLH used in his 80W FET amplifier with foldback limiting in the regulators that many on this Forum critisied as sounding bad.
I use IV limiting (at the output stage) with a time constant built in to allow peaks to get through without triggering. Still not sorted the numbers out to ensure reliability AND good sound. I am aimimg for close to DC SOAR limiting and roughly double on 10mS peaks. Probably a lot more than double on short transients.
thanks for that explanation.
Seems to be the same as JLH used in his 80W FET amplifier with foldback limiting in the regulators that many on this Forum critisied as sounding bad.
I use IV limiting (at the output stage) with a time constant built in to allow peaks to get through without triggering. Still not sorted the numbers out to ensure reliability AND good sound. I am aimimg for close to DC SOAR limiting and roughly double on 10mS peaks. Probably a lot more than double on short transients.
G.Kleinschmidt said:
Have you tried using the fuses exclusively for DC and subsonic protection? If you bypass a rail fuse (not the transformer primary fuse, obviously) with a decent size capacitor, the majority of the signal will not contribute to heating of the fuse. This way, you can rate the fuse to carry the bias current plus a small margin, and have it pop earlier if there is a problem.
Of course, subsonics will trip such a fuse as well, but if you put the F3 in the infrasound range, this will be a Good Thing(tm) in my opinion.
As a possibly interesting anecdote on that note, I once put on the Insomnia album by Biosphere, and fortunately had the volume pretty low when it hit track 3. What happens there is, he's sampled some ambient sounds by the coast, but has neglected to consider the fact that the ocean surface is a pretty damn big membrane putting out a lot of power at about 3Hz. Of course, the mic isn't very sensitive that far down, but it was still enough to bring the woofers within millimetres of their max excursion at a low volume. I dread to think what would've happened if I was listening at a higher volume.
Christer said:
Vacuum Fluorescent Displays were the first large-scale appearance of miniature tubes, and I imagine you could use the concept for a triode or somesuch as well, provided the manufacturer was willing to do so, which has a probability whose distance to zero is given by Heisenberg
Field Emission Displays will be even more miniaturized, and may lead to the development of valve based digital circuits for military applications.
I doubt we'll be seeing much in the way of analog ICs with microtriodes in them any time soon, though. It costs too much to be profitable.
AndrewT said:
You're welcome.
An important question is whether the regulators were a bottleneck in the circuit or not? You need at least as much raw current capability in the regulator as in the output stage, and if you want DC regulation, you will also be doing a lot of dissipation.
I'd go for a bypassed fuse on each rail and AC regulation with a proper SOA limiter on the regulator, with the highpass of the reg set about a decade below that of the fuse bypass. And as many devices (of the same type) in the reg as in the output stage.
Nico Ras said:
Your question reminds me that there may be two different possible definitions of what we are calling Class AAB. Or perhaps just two su-classes of Class-AAB.
I'm making this up as I go along, so bear with me.
The first is that of an amplifier that runs truly class A up to several watts, merely by virtue of the amount of idle bias that is set to run through it. The definition of several watts is, say, between 1% and 10% of its rated power. It is biased at the optimum value for Class AB that minimizes gm doubling, resulting in a voltage across RE on the order of 20 mV. In order for this amplifier to run this much idle current while still using a value of RE that permits adequate bias stability, it will tend to have a good number of output pairs.
The second is that of an amplifier that again runs truly class A up to several watts by virtue of its idle bias current, but in this one the Class A operation at low power is achieved by running a higher-than-Class-AB-optimum bias current through the output transistors, such that the voltage drop across RE is substantially greater than, say, 25 mV. This type of Class AAB will be more subject to gm doubling in theory, but in fact may have quite low effect of gm doubling if a substantial number of transistors are connected in parallel. If this amplifier has the same total idle bias and number of output pairs as the one in the first example of Class AAB, it will have somewhat larger RE values and will exhibit better thermal stability and ease of matching output device current sharing.
Either of these design approaches is completely legitimate and capable of high performance.
Lastly, yet a third possible definition of Class AAB would be a Class AB amplifier whose idle bias dissipation is a substantial fraction of its dissipation when driving 1/3 third power into 8 ohms. This comes from the observation that if you had to pass the FTC 1/3 power test (no longer really adhered to), and you have to design the heatsinks accordingly, you may as well dissipate nearly that amount at idle if you really want to push the limits.
Cheers,
Bob