Gain
Cheff,
Maybe the feedbackresistors (470k) lower the input impedance
of the BOSOZ stage in a way that the open loop gain of the
first stage is influenced by virtually paralleling this 470k divided
thru the gain of the second stage. This means paralleling too
less resistance to the 4k resistors thus reducing open loop gain.
Imagine an open loop gain of say 1000. Now apply feedback to
a theoretical gain of 100 with fb resistors 1:100. Measuring
this circuit will show a gain of 90.9 istead of 100!
Uli
Cheff,
Maybe the feedbackresistors (470k) lower the input impedance
of the BOSOZ stage in a way that the open loop gain of the
first stage is influenced by virtually paralleling this 470k divided
thru the gain of the second stage. This means paralleling too
less resistance to the 4k resistors thus reducing open loop gain.
Imagine an open loop gain of say 1000. Now apply feedback to
a theoretical gain of 100 with fb resistors 1:100. Measuring
this circuit will show a gain of 90.9 istead of 100!
Uli
Uli,
Yep, that's what I thought... Each stage, isolated from the other, has a flat frequency response according to simulations. The two stages connected, with the feedback loop, but without the RIAA network, has also a flat frequecy response. The first stage, with the RIAA network has the awaited frequency response. The drain load (R1 & R2 on post #1) was taken to be a mere 4k. I evaluated the real output impedance of the first stage (without RIAA), and it gave me about 4060 Ohms, if memory serves. I also computed the input impedance of the second stage (don't remember the value ) All these values were not hugely frequency dependant, almost constant in fact in the audio band. Then I //ed second stage Zin with the first stage Zout. I recomputed the RIAA network according to this new drain load. Small changes in the RIAA netw. values, but no change on the LF frequency response... The > 1kHz band perfectly fits RIAA, but I still had a bad behavior at low frequencies 
I know it's only simulations, and models are not reality, but I'd say it would affect high frequencies more than low ones. Time constants here near 20 Hz are very large, and the ones induced by parasitic caps in models and so on are smaller by many orders of magnitude.
I don't know about the open loop gain of the beast, but I'd rather see a bad phase behavior problem, more than a gain one.... But I'm trying to learn
Thanks for the clue
Yep, that's what I thought... Each stage, isolated from the other, has a flat frequency response according to simulations. The two stages connected, with the feedback loop, but without the RIAA network, has also a flat frequecy response. The first stage, with the RIAA network has the awaited frequency response. The drain load (R1 & R2 on post #1) was taken to be a mere 4k. I evaluated the real output impedance of the first stage (without RIAA), and it gave me about 4060 Ohms, if memory serves. I also computed the input impedance of the second stage (don't remember the value
) All these values were not hugely frequency dependant, almost constant in fact in the audio band. Then I //ed second stage Zin with the first stage Zout. I recomputed the RIAA network according to this new drain load. Small changes in the RIAA netw. values, but no change on the LF frequency response... The > 1kHz band perfectly fits RIAA, but I still had a bad behavior at low frequencies I know it's only simulations, and models are not reality, but I'd say it would affect high frequencies more than low ones. Time constants here near 20 Hz are very large, and the ones induced by parasitic caps in models and so on are smaller by many orders of magnitude.
I don't know about the open loop gain of the beast, but I'd rather see a bad phase behavior problem, more than a gain one.... But I'm trying to learn
Thanks for the clue
gain2
Hi Cheff,
the reason why your gain loss occurs just in the lf is clear:
the gain difference between 500Hz and 50 Hz is 20dBs!
The close you come to openloop gain the bigger the error!
BTW you parallel not only the 10k to 4K but also half of the
RIAA network. This sum makes the error.Try putting in 100k
instead of 10k and 4.7M instead of 470k. I´m very sure that
the error drops but doesn´t turn to zero.
Uli
Hi Cheff,
the reason why your gain loss occurs just in the lf is clear:
the gain difference between 500Hz and 50 Hz is 20dBs!
The close you come to openloop gain the bigger the error!
BTW you parallel not only the 10k to 4K but also half of the
RIAA network. This sum makes the error.Try putting in 100k
instead of 10k and 4.7M instead of 470k. I´m very sure that
the error drops but doesn´t turn to zero.
Uli
Thanks Uli !
Uli,
Thanks for opening my eyes
! I made the modifications you mentionned : refering to post #1 schematic, I removed C1 & C2, also removed R5 & R6, swapped R7 & R8 to 100K, and Rfb1 & Rfb2 to 4.7Meg. Magic ! You're right - as usual, may I add - the LF error has gone !
But... There's now a bigger error around 20kHz... I plotted the input impedance of the "feedbacked" stage, and it shows a peak between 10kHz and 20kHz. I think the different caps inside the mosfets begin to act here, and downgrade the HF performances...
Thus I tried the same configuration, but with the Jfet/BJT folded cascode, as in post #5, but with the "old" feedback loop. The input impedance of this stage is now almost constant (208 KOhms). And YES!!! The final RIAA deviation is quite good. I've attached the interesting portion of the modified schematic, together with the deviation from standard RIAA.
The interesting thing here is that I will be able to try both configurations simply by modifying the position of the feedback loop... Despite the fact I don't like to use such high-valued resistors (4M7) in feedback loops, since I think they're more prone to pickup parasitics, I already wonder which one will sound the best
Thanks again Uli for enlightening me
Uli,
Thanks for opening my eyes
! I made the modifications you mentionned : refering to post #1 schematic, I removed C1 & C2, also removed R5 & R6, swapped R7 & R8 to 100K, and Rfb1 & Rfb2 to 4.7Meg. Magic ! You're right - as usual, may I add - the LF error has gone ! But... There's now a bigger error around 20kHz... I plotted the input impedance of the "feedbacked" stage, and it shows a peak between 10kHz and 20kHz. I think the different caps inside the mosfets begin to act here, and downgrade the HF performances...
Thus I tried the same configuration, but with the Jfet/BJT folded cascode, as in post #5, but with the "old" feedback loop. The input impedance of this stage is now almost constant (208 KOhms). And YES!!! The final RIAA deviation is quite good. I've attached the interesting portion of the modified schematic, together with the deviation from standard RIAA.
The interesting thing here is that I will be able to try both configurations simply by modifying the position of the feedback loop... Despite the fact I don't like to use such high-valued resistors (4M7) in feedback loops, since I think they're more prone to pickup parasitics, I already wonder which one will sound the best
Thanks again Uli for enlightening me
Attachments
Re: Thanks Uli !
Hi Cheff , Uli and all.
An idea for the input stage , or first stage of this design that also make the RIAA eq.:
having read the motive for the last changes on schematics (feedback effects from the second stage to the eq network) and thinking about a better PSRR and CMRR that we are guessing since we like the possibility to connect the cartridge balanced,
WHY NOT use an input stage with FOLDED CASCODE but WITHOUT feedback loops , I mean , like the Nelson's patent BUT without feeback loops.
OK I see the actual diff pair is already cascoded , but I tried the BSOZ cascoded , and I tried BSOZ with folded casode . The second circuit allows you to have the output a virtual ground and IMHO it sound better than a simpler cascode diff pair.We could made it ,say , with ZVP's mosfets I think.
Then , my question is how to implement the RIAA network ,
still between the drains of the diff pair , or between the virtual ground outputs?
I see at this metod thinkin' also at the phase coerence of the RIAA and the interactions with the following gain stage.
Lots of possibilities raises ...
IMHO , the folded cascode has a better PSRR
Please comment.
CheffDeGaar said:
Hi Cheff , Uli and all.
An idea for the input stage , or first stage of this design that also make the RIAA eq.:
having read the motive for the last changes on schematics (feedback effects from the second stage to the eq network) and thinking about a better PSRR and CMRR that we are guessing since we like the possibility to connect the cartridge balanced,
WHY NOT use an input stage with FOLDED CASCODE but WITHOUT feedback loops , I mean , like the Nelson's patent BUT without feeback loops.
OK I see the actual diff pair is already cascoded , but I tried the BSOZ cascoded , and I tried BSOZ with folded casode . The second circuit allows you to have the output a virtual ground and IMHO it sound better than a simpler cascode diff pair.We could made it ,say , with ZVP's mosfets I think.
Then , my question is how to implement the RIAA network ,
still between the drains of the diff pair , or between the virtual ground outputs?
I see at this metod thinkin' also at the phase coerence of the RIAA and the interactions with the following gain stage.
Lots of possibilities raises ...
IMHO , the folded cascode has a better PSRR
Please comment.
Hi stefanobilliani.
Another great idea
I couldn't resist testing your idea. I made quick simulations to see what was happening Basically, I used the same folded cascode principle as in "my" second stage, but not "feedbacked". First thing that appeared is that the impedance seen at the drains of the input diff pair is now far too low (near 200 Ohms) to give acceptable values (for me) for the Riaa network components (caps of tens of uF and resistors of hundreds of kOhms).
The impedance at the output of the folded cascode is much more interesting, but is not quite easy to determine. Mainly, it's the output impedance of the current sources, and simulations gave me something near the MegaOhm. It's quite nice, since it leads to small (and cheaper) values of caps for the Riaa network The problem is this impedance can not be easily accessed in reality. Thus I tried to add a "small" resistor (47k) between output and ground, to get a more controllable impedance (47k//1Meg). I computed the Riaa network according to this load impedance, et voilà
The attached schematic shows this input stage, and the RIAA fidelity, which is awesome !!!!
. Gain @ 1kHz is about 26dB. Output impedance with the Riaa network can be roughly calculated as the output resistance (47.5k) //ed with twice the R7 resistance of the Riaa network(2x28.8k), leading here to 26kOhms. This can be decreased by lowering the ouput resistor, and riaa network has to be readjusted accordingly.
I've tried simulations with a ZVP3306 mosfet instead of a BC560 BJT, but it didn't show differences.
Well, it should be possible to implement such an input stage. One thing that bothers me is the critical biasing of the cascode, since it's very sensitive to the stability of the bias. But 0V at the outputs here is not mandatory, and the output offset can be corrected at the second stage...I will try to investigate the PSRR as soon as I find a method to do it
.
Comments ?
Another great idea
I couldn't resist testing your idea. I made quick simulations to see what was happening
Basically, I used the same folded cascode principle as in "my" second stage, but not "feedbacked". First thing that appeared is that the impedance seen at the drains of the input diff pair is now far too low (near 200 Ohms) to give acceptable values (for me) for the Riaa network components (caps of tens of uF and resistors of hundreds of kOhms). The impedance at the output of the folded cascode is much more interesting, but is not quite easy to determine. Mainly, it's the output impedance of the current sources, and simulations gave me something near the MegaOhm. It's quite nice, since it leads to small (and cheaper) values of caps for the Riaa network
The problem is this impedance can not be easily accessed in reality. Thus I tried to add a "small" resistor (47k) between output and ground, to get a more controllable impedance (47k//1Meg). I computed the Riaa network according to this load impedance, et voilà The attached schematic shows this input stage, and the RIAA fidelity, which is awesome !!!!
. Gain @ 1kHz is about 26dB. Output impedance with the Riaa network can be roughly calculated as the output resistance (47.5k) //ed with twice the R7 resistance of the Riaa network(2x28.8k), leading here to 26kOhms. This can be decreased by lowering the ouput resistor, and riaa network has to be readjusted accordingly.I've tried simulations with a ZVP3306 mosfet instead of a BC560 BJT, but it didn't show differences.
Well, it should be possible to implement such an input stage. One thing that bothers me is the critical biasing of the cascode, since it's very sensitive to the stability of the bias. But 0V at the outputs here is not mandatory, and the output offset can be corrected at the second stage...I will try to investigate the PSRR as soon as I find a method to do it
.Comments ?
Attachments
Hi Uli.
Begins to get to complicated for me . I will first try with the "conventional" resistors, just to see what I get... I've plotted the CMRR for the schematic of post #14 (top) and the same for the schematic of post #24 , and you can see it's no too bad... Surely it can be improved, but is it worth the expense in complexity ?
Begins to get to complicated for me
. I will first try with the "conventional" resistors, just to see what I get... I've plotted the CMRR for the schematic of post #14 (top) and the same for the schematic of post #24 , and you can see it's no too bad... Surely it can be improved, but is it worth the expense in complexity ?Attachments
Cheff,
I've build a super-fast P2P version of the last input stage , for verifying the noise pick-up.
A regulated supply (+30/-30) and a battery for the bases of BJT that formes the folded cascode.
Well .the circuit truly amplifies the signal and the noise seems quite low .
Not tried yet the RIAA , but I believe we can expect some decent results .
I've build a super-fast P2P version of the last input stage , for verifying the noise pick-up.
A regulated supply (+30/-30) and a battery for the bases of BJT that formes the folded cascode.
Well .the circuit truly amplifies the signal and the noise seems quite low .
Not tried yet the RIAA , but I believe we can expect some decent results .
Hi stefano,
Nice you could try this stage ! How fast you are ! Did you have any problems properly biasing the cascode to get 0V at ouputs ? Is it stable ? Did you try with the values (resistors/currents) I gave on the schematic, or did you adapt to fit what you had handy ?
I'm still working on a pcb, since at such low levels for signals, I don't want to take any risks to hear a nice HMMMM or radio .
Hold on, and thanks again for the test
Nice you could try this stage ! How fast you are ! Did you have any problems properly biasing the cascode to get 0V at ouputs ? Is it stable ? Did you try with the values (resistors/currents) I gave on the schematic, or did you adapt to fit what you had handy ?
I'm still working on a pcb, since at such low levels for signals, I don't want to take any risks to hear a nice HMMMM or radio
. Hold on, and thanks again for the test
Cheff.
Well ,
I did not obtain 0 volts , but :
A resistor of 4.4k was used biasin' the folded cascode (each side)
The current trough diff pair with CCS (BC550, led reference voltage .110 ohm resistor ) 10mA
At the bases of bjt 7.5 volt ( what I tried ) wasn't enough to produce 0 volts , but it puts the outputs at midpoint of the positive suplly rail ,15 volt.
I haven't got another battery but I think that is not a problem at all.
**********
Is the amp stable? I haven't got a scope for verify properly , but is my intention , once build the circuit , to go to some tech labs
and do some serious tests.
***********
Important:
This is only a fast test . By the way , thanks a lot for the precious simulations .
Well ,
I did not obtain 0 volts , but :
A resistor of 4.4k was used biasin' the folded cascode (each side)
The current trough diff pair with CCS (BC550, led reference voltage .110 ohm resistor ) 10mA
At the bases of bjt 7.5 volt ( what I tried ) wasn't enough to produce 0 volts , but it puts the outputs at midpoint of the positive suplly rail ,15 volt.
I haven't got another battery but I think that is not a problem at all.
**********
Is the amp stable? I haven't got a scope for verify properly , but is my intention , once build the circuit , to go to some tech labs
and do some serious tests.
***********
Important:
This is only a fast test .
By the way , thanks a lot for the precious simulations . 
Hi there,
did anyone of you finish that approach? the reason i ask is that i have build la boheme and want to try different input stages now. Why? while building the thing i had a far better sounding input stage than in my last incarnation and can't find the way back
So i guess that some different tries may be well worth the effort.
So, every balanced input stage that is transparant soundwise and does not affect the musical timing negativly is deeply welcome...
While buliding the thing I had some more or less strange findings:
- carbon res. might sound better in the riaa filter
- best to have a single gaindevice (that means a 'single diff pair' (dear me...)) that should be served well to produce enough gain. (casc., ccs etc.)
- topology and cute physical layout outsmarts boutique components always and everywhere
- try to get good filtring caps that have small physical dimensions (no idea how to do this) Does anyone know of teflon caps? AoE mentions these.
- a clear, open and, well, serving mind
onvinyl
did anyone of you finish that approach? the reason i ask is that i have build la boheme and want to try different input stages now. Why? while building the thing i had a far better sounding input stage than in my last incarnation and can't find the way back
So i guess that some different tries may be well worth the effort.
So, every balanced input stage that is transparant soundwise and does not affect the musical timing negativly is deeply welcome...
While buliding the thing I had some more or less strange findings:
- carbon res. might sound better in the riaa filter
- best to have a single gaindevice (that means a 'single diff pair' (dear me...)) that should be served well to produce enough gain. (casc., ccs etc.)
- topology and cute physical layout outsmarts boutique components always and everywhere
- try to get good filtring caps that have small physical dimensions (no idea how to do this) Does anyone know of teflon caps? AoE mentions these.
- a clear, open and, well, serving mind
onvinyl
Curiosity's welcome
Well, had some tries with it, but I never managed to properly bias the folded cascodes to get a stable output offset, but the tests I've made showed me it was roughly working (read amplifying), but the offset was way too high and wandering...
But I still want to get something working, and I'm planning to test this version, much more classical... Switched the input fets to 2SK369 to get more gain, and added a more classical gain stage, but X'ed. Simulations show a rough gain of 48dB @ 1kHz.
It's in the pipe, but too many things to do and too little time.... But anyway, comments and flames are welcome.
Well, had some tries with it, but I never managed to properly bias the folded cascodes to get a stable output offset
, but the tests I've made showed me it was roughly working (read amplifying), but the offset was way too high and wandering...But I still want to get something working, and I'm planning to test this version, much more classical... Switched the input fets to 2SK369 to get more gain, and added a more classical gain stage, but X'ed
. Simulations show a rough gain of 48dB @ 1kHz.It's in the pipe, but too many things to do and too little time.... But anyway, comments and flames are welcome.
Hi Cheff,
thanks o lot for the reply. Yes, the pipe is always far to narrow!
DC Offset might be an issue still. Having build the la boheme, i have an offset of roughly 0,5 Volts after the first stage there.
One possible idea would be to split the riaa to make the 'floating' network simpler, probably by building the low pass filter around the series susy-input-resistors at the gates of the 2sj109 by simply adding a Cap from 100k/1M- node to ground.
Rüdiger
thanks o lot for the reply. Yes, the pipe is always far to narrow!
DC Offset might be an issue still. Having build the la boheme, i have an offset of roughly 0,5 Volts after the first stage there.
One possible idea would be to split the riaa to make the 'floating' network simpler, probably by building the low pass filter around the series susy-input-resistors at the gates of the 2sj109 by simply adding a Cap from 100k/1M- node to ground.
Rüdiger
Hi Rüdiger,
I was advised to split the RIAA network, but frankly I don't see the issue here. More hints for me ?
One advantage of the floating network is that it doesn't need twice the components (which are to be carefully matched) when we want to go fully balanced. Moreover, adding a cap at the SuSy node would change the AC impedance seen by the drain loads, and hence I would have to correct it on the remaining floating network... I don't have sufficient math skills
WRT DC offset, my problem was that it was not stabilizing, inducing LF variations at the output... Thus I decided to give up with folded cascode, 'cause of by beotian design skills. I now want to try output caps, using them also as a poor man's rumble filter (when loaded by the following stage input impedance)...
I've gathered most of the parts, but I have to find the time to make the PCB or to breadboard it... Stay tuned
Anyway, thanks for your input
I was advised to split the RIAA network, but frankly I don't see the issue here. More hints for me ?
One advantage of the floating network is that it doesn't need twice the components (which are to be carefully matched) when we want to go fully balanced. Moreover, adding a cap at the SuSy node would change the AC impedance seen by the drain loads, and hence I would have to correct it on the remaining floating network... I don't have sufficient math skills
WRT DC offset, my problem was that it was not stabilizing, inducing LF variations at the output... Thus I decided to give up with folded cascode, 'cause of by beotian design skills. I now want to try output caps, using them also as a poor man's rumble filter (when loaded by the following stage input impedance)...
I've gathered most of the parts, but I have to find the time to make the PCB or to breadboard it... Stay tuned
Anyway, thanks for your input
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