Agreed. Besides the apparent better jitter spec, running at a higher sampling rate should have the benefit of the ultrasonic 'image' being shifted upward with sampling frequency, and also the frequency response the higher sampling rate is essentially flat to 20kHz, which is not the case at 44.1 with I2S input..
Definitely worth including as an option, only costs you one input connector and some minor rerouting (essentially nothing).
Thanks for your advice s3tup, I appreciate your response.
Ill add another u.fl reciprocal for simultaneous input and float the mode selector pin.
I've downloaded saturn pcb design, so ill have a go matching the impedances.
Hi Ryanj,
firstly I would move the signal from pin 6 to the top layer and rout it around the U.FL connectors, this will remove the big slot in the ground plane from where it could do the most harm.
When we do cheap RF boards (simple switch remotes etc in the 433MHz range etc) which are quite often 2 layer 1.6mm, we just neck down the track into the connectors, otherwise it just gets silly, RF requires the impedance matching more than digital and on a two layer board the track widths get silly. Come out of the pad with a trace the same width of the pad for as short a distance as possible then change the width up to the required width for 50R or as near as you can get (a 35um plated through hole board. copper is approx. 53um after plating requires a track of 2.1mm!!!!!).
When RF is not being used the track width is often done as you have done it, as wide as possible and just one width down the whole length.
I would also add stiching vias at numerous positions to join the top and bottom pours together.
The supply pin decoupling capacitors would be better down to the proper ground plane not on the star (star routing is not good for digital designs where there is a lot of high frequency noise bouncing about).
I am sure I use to have an app note for this device that also had a layout guide, but I cannot find it at the moment!!!!
firstly I would move the signal from pin 6 to the top layer and rout it around the U.FL connectors, this will remove the big slot in the ground plane from where it could do the most harm.
When we do cheap RF boards (simple switch remotes etc in the 433MHz range etc) which are quite often 2 layer 1.6mm, we just neck down the track into the connectors, otherwise it just gets silly, RF requires the impedance matching more than digital and on a two layer board the track widths get silly. Come out of the pad with a trace the same width of the pad for as short a distance as possible then change the width up to the required width for 50R or as near as you can get (a 35um plated through hole board. copper is approx. 53um after plating requires a track of 2.1mm!!!!!).
When RF is not being used the track width is often done as you have done it, as wide as possible and just one width down the whole length.
I would also add stiching vias at numerous positions to join the top and bottom pours together.
The supply pin decoupling capacitors would be better down to the proper ground plane not on the star (star routing is not good for digital designs where there is a lot of high frequency noise bouncing about).
I am sure I use to have an app note for this device that also had a layout guide, but I cannot find it at the moment!!!!
Thank you Marce for the inputs...
We need a RF specialist because if the Layout is noiser than the expensive crystal... all efforts will be killed by a not good enough design of the core board for sure ! switching noise generate by the MSB decoupling can be horrible... and mask the good performance of the crystal !
My understanding is than RyanJ put the gnd plane on the top because the difficults 3 voltages (+5, -5,-15 V) but don't know really if because of that.
Do you mean a plain little ground below the pcb for the MSB decoupling will be better than a star grounding via the 2 TDA pins , A vias on the midle on the little groun plane to connect with the continuous gnd plane above just under the body chip ?
@ all : what is your understanding about the design John gave and RyanJ took ? He is said to be on of the best for DIY with the MSB for TDA1541, but maybe RF specialists have a word to say also, no ? On a old Marantz with mono TDA1540 I have, msb and ps are maid via a gnd lead below the pcb and connect to the top continous gnp plane with a vias... but it was in the 80's !
don't know myself as non expert at all even in DIY with TDA1541 ! What do you think about ?
Andrea, can you explain please which Ian canada boards are involved here if the core board sucees to born ! Where is putted the crystal : both on the core board or one of the Ian's module ?
We need a RF specialist because if the Layout is noiser than the expensive crystal... all efforts will be killed by a not good enough design of the core board for sure ! switching noise generate by the MSB decoupling can be horrible... and mask the good performance of the crystal !
My understanding is than RyanJ put the gnd plane on the top because the difficults 3 voltages (+5, -5,-15 V) but don't know really if because of that.
Do you mean a plain little ground below the pcb for the MSB decoupling will be better than a star grounding via the 2 TDA pins , A vias on the midle on the little groun plane to connect with the continuous gnd plane above just under the body chip ?
@ all : what is your understanding about the design John gave and RyanJ took ? He is said to be on of the best for DIY with the MSB for TDA1541, but maybe RF specialists have a word to say also, no ? On a old Marantz with mono TDA1540 I have, msb and ps are maid via a gnd lead below the pcb and connect to the top continous gnp plane with a vias... but it was in the 80's !
don't know myself as non expert at all even in DIY with TDA1541 ! What do you think about ?
Andrea, can you explain please which Ian canada boards are involved here if the core board sucees to born ! Where is putted the crystal : both on the core board or one of the Ian's module ?
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I try to explain.
My suggestion is to use Ian's Fifo buffer board as the ASRC, slaving it from the core board BCK. So:
- I2S FIFO KIT V3.80 (http://www.diyaudio.com/forums/grou...-pdif-fifo-kit-group-buy-104.html#post3372684)
- the kit includes a reclocking board that should be removed (use the Fifo buffer only)
- oscillator board with the Laptech crystal at 5.6448MHz
- the oscillator board must provide 2 outputs: 1 for the main Fifo board, 1 for the core board (dac chip BCK)
- the oscillator board could be placed close to the dac on the core board (best solution) or connected to the core board with short u.fl cable
- the Fifo main board to be connected to the clock via u.fl cable
- one more option could be to place the oscillator board in a metal box and connect it to Fifo and core board both with u.fl cable (SMA to u.fl)
Please, someone who manage english language better then me, understanding what I said, can explain better?
My suggestion is to use Ian's Fifo buffer board as the ASRC, slaving it from the core board BCK. So:
- I2S FIFO KIT V3.80 (http://www.diyaudio.com/forums/grou...-pdif-fifo-kit-group-buy-104.html#post3372684)
- the kit includes a reclocking board that should be removed (use the Fifo buffer only)
- oscillator board with the Laptech crystal at 5.6448MHz
- the oscillator board must provide 2 outputs: 1 for the main Fifo board, 1 for the core board (dac chip BCK)
- the oscillator board could be placed close to the dac on the core board (best solution) or connected to the core board with short u.fl cable
- the Fifo main board to be connected to the clock via u.fl cable
- one more option could be to place the oscillator board in a metal box and connect it to Fifo and core board both with u.fl cable (SMA to u.fl)
Please, someone who manage english language better then me, understanding what I said, can explain better?
For Mr big Mustach Chewbacca Eldam your english is very good enough !
Look my english : http://www.youtube.com/watch?v=FtIVC4sFrEk&list=RDFtIVC4sFrEk&feature=player_detailpage
have to see if the Buffer can be bought alone as it is expensive... indeed for me.
But I see no reason to use the amereno USB to I2S without the Ian Fifo buffer for the ones like me with more simple needs. But I can mistake (between the true I2S, the right/left justified, I'm lost- for my understanding TDA1541 is "true" I2S as Philips/Sony maid it- If anybody has testimonies with an USB Amaraneo async with TDA 1541 : you are welcome !
SPIDF board: I know no good board with UFL - so gived up if no vias (holes) on spidf U.FL pads. (No lost of inductance if the holes is on the midle on the pad for a cap or a connector: Marce input).
To follow Marce advises, the better for your clock coard should be to stack with vias hole to short gnd connection between the Gnd of the two boards. I don't know if RyanJ can easily adding vias holes with him soft ? If so need to make some vias hole around the board, the closest but not near a polarized pin of a cap or near a signal or power lead...
RyanJ it's ok for you ? Need help ? had time to try to convert a screen into gerber files ?
Thank you at least for your work
. With merging all the good knowledges, free design, goodwilled advises and time of everybody here, we are near to have a cute & brillant little coreboard for the vaillant old chip 
Look my english : http://www.youtube.com/watch?v=FtIVC4sFrEk&list=RDFtIVC4sFrEk&feature=player_detailpage
have to see if the Buffer can be bought alone as it is expensive... indeed for me.
But I see no reason to use the amereno USB to I2S without the Ian Fifo buffer for the ones like me with more simple needs. But I can mistake (between the true I2S, the right/left justified, I'm lost- for my understanding TDA1541 is "true" I2S as Philips/Sony maid it- If anybody has testimonies with an USB Amaraneo async with TDA 1541 : you are welcome !
SPIDF board: I know no good board with UFL - so gived up if no vias (holes) on spidf U.FL pads. (No lost of inductance if the holes is on the midle on the pad for a cap or a connector: Marce input).
To follow Marce advises, the better for your clock coard should be to stack with vias hole to short gnd connection between the Gnd of the two boards. I don't know if RyanJ can easily adding vias holes with him soft ? If so need to make some vias hole around the board, the closest but not near a polarized pin of a cap or near a signal or power lead...
RyanJ it's ok for you ? Need help ? had time to try to convert a screen into gerber files ?
Thank you at least for your work
. With merging all the good knowledges, free design, goodwilled advises and time of everybody here, we are near to have a cute & brillant little coreboard for the vaillant old chip
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Said to be better than the crystek 957 ?
NZ2520SD(OA / AV)/Crystal Clock Oscillators/NDK
If the sharing and printing will sucess I'm looking for cheaper USB/I2S with lower noise for people who want a cheaper input than the FIFO and plugs compatible.
NZ2520SD(OA / AV)/Crystal Clock Oscillators/NDK
If the sharing and printing will sucess I'm looking for cheaper USB/I2S with lower noise for people who want a cheaper input than the FIFO and plugs compatible.
Not sure, but does the 1541 have separate analogue and digital voltage supplies? Just short on memeory currently. Be nice if we could separate the grounds is all between the two. Looks nice though, love the old girl, she makes music!
What smd caps are you looking at using on this, we have a preference for a through hole currently but be interested in what peoples have found the best for this application currently.
Chuz,
Drew.
What smd caps are you looking at using on this, we have a preference for a through hole currently but be interested in what peoples have found the best for this application currently.
Chuz,
Drew.
Hi Pet, thank you to share
My understanding is there are 2 rails (+5 V & -15 V)... but maybe the three rails are used both for digital & analog internal section of the chip? Not a specialist of DAC, my understanding is very low but I believe than each time the GnD pins (digital & Analog) has to be connect at the analog continous gnd plane with the shortest way to it as on the official datasheet. I don't know if one of the three voltage are enterily for the internal digital section ? In the datasheet, it seems it could be the + 5V as we can see this pin stared to gnd with the two gnd pins ?! But this interpretation seems to simple IMHO...
Philips TDA1541A d/a converter - DutchAudioClassics.nl
But look at the pins of the chip : analog pins & digitals pins are fare away from each others. Worst : analog gnd pin n°5 is nearer to Digital +5V Vcc pin°28 than digital gnd pin n°14 (but this las near the -15 V n° 15 pin : which is good if it supply internally the digital section).
My understanding to force a ground loop between digital gnd pin and the + 5 V pin should be a good idea in relation to the closest Analog Gnd pin 5 (if this one really supply the internal digital section) should be to join us together via a bulk cap of say 3 pF putted on the top of the TDA chip. Each pin are of course localy connect to the continous gnd plane also.
But the question is difficult. Pin 5 is the star ground source for the DEM decoupling gnd layer beneath the pcb (between the pins of the chips)also.
But you can be sure it's a bad idea if nobody saw it in 30 years in a design.
Here the ideas we are dealing with came from the best contributors : John from ECdesigns who shared for 6 years on his thread here; T. Loesch : 30 years of experience with the TDA chip, some inputs from specialist : Marce fellow : 28 years of professionals RF design; share of experienced diyers (Alexiis, set3up, Ceglar, AudiolapDance and others who listen to many off shelves and diy DAC/players with this chip.)
Hé australians are very active in this thread....
My understanding is there are 2 rails (+5 V & -15 V)... but maybe the three rails are used both for digital & analog internal section of the chip? Not a specialist of DAC, my understanding is very low but I believe than each time the GnD pins (digital & Analog) has to be connect at the analog continous gnd plane with the shortest way to it as on the official datasheet. I don't know if one of the three voltage are enterily for the internal digital section ? In the datasheet, it seems it could be the + 5V as we can see this pin stared to gnd with the two gnd pins ?! But this interpretation seems to simple IMHO...
Philips TDA1541A d/a converter - DutchAudioClassics.nl
But look at the pins of the chip : analog pins & digitals pins are fare away from each others. Worst : analog gnd pin n°5 is nearer to Digital +5V Vcc pin°28 than digital gnd pin n°14 (but this las near the -15 V n° 15 pin : which is good if it supply internally the digital section).
My understanding to force a ground loop between digital gnd pin and the + 5 V pin should be a good idea in relation to the closest Analog Gnd pin 5 (if this one really supply the internal digital section) should be to join us together via a bulk cap of say 3 pF putted on the top of the TDA chip. Each pin are of course localy connect to the continous gnd plane also.
But the question is difficult. Pin 5 is the star ground source for the DEM decoupling gnd layer beneath the pcb (between the pins of the chips)also.
But you can be sure it's a bad idea if nobody saw it in 30 years in a design.
Here the ideas we are dealing with came from the best contributors : John from ECdesigns who shared for 6 years on his thread here; T. Loesch : 30 years of experience with the TDA chip, some inputs from specialist : Marce fellow : 28 years of professionals RF design; share of experienced diyers (Alexiis, set3up, Ceglar, AudiolapDance and others who listen to many off shelves and diy DAC/players with this chip.)
Hé australians are very active in this thread....
extract of page 15, hope it helps : (not sure to understand what is a ground pin in my mother language!?).
There are a number of important points to be considered when making signal and power
connections. First of all a connector is one of the few places in the system where all signal
conductors must run in parallel—it is therefore imperative to separate them with ground pins
(creating a faraday shield) to reduce coupling between them.
Multiple ground pins are important for another reason: they keep down the ground impedance at
the junction between the board and the backplane. The contact resistance of a single pin of a
PCB connector is quite low (of the order of 10 mΩ) when the board is new—as the board gets
older the contact resistance is likely to rise, and the board's performance may be compromised. It
is therefore well worthwhile to allocate extra PCB connector pins so that there are many ground
connections (perhaps 30-40% of all the pins on the PCB connector should be ground pins). For
similar reasons there should be several pins for each power connection, although there is no need
to have as many as there are ground pins.
There are a number of important points to be considered when making signal and power
connections. First of all a connector is one of the few places in the system where all signal
conductors must run in parallel—it is therefore imperative to separate them with ground pins
(creating a faraday shield) to reduce coupling between them.
Multiple ground pins are important for another reason: they keep down the ground impedance at
the junction between the board and the backplane. The contact resistance of a single pin of a
PCB connector is quite low (of the order of 10 mΩ) when the board is new—as the board gets
older the contact resistance is likely to rise, and the board's performance may be compromised. It
is therefore well worthwhile to allocate extra PCB connector pins so that there are many ground
connections (perhaps 30-40% of all the pins on the PCB connector should be ground pins). For
similar reasons there should be several pins for each power connection, although there is no need
to have as many as there are ground pins.
Sure,
I 'm not sure than the - 5V is more important than the -15 V pin for the digital... so the - 15 V is near the D Gnd... nothing to add but just connect the gnd pins to the continous ground if you make your own pcb.
Here we are a little focused on the pcb layout around the TDA 1541 with I2S inputs , not on the caps value and trying to let born a final result with gerbers files after a final shematic with the free time people have.
But you will find such info in the long ECDESIGN thread (... and above in some links Audiolapdance gave).
I 'm not sure than the - 5V is more important than the -15 V pin for the digital... so the - 15 V is near the D Gnd... nothing to add but just connect the gnd pins to the continous ground if you make your own pcb.
Here we are a little focused on the pcb layout around the TDA 1541 with I2S inputs , not on the caps value and trying to let born a final result with gerbers files after a final shematic with the free time people have.
But you will find such info in the long ECDESIGN thread (... and above in some links Audiolapdance gave).
To follow Marce advises, the better for your clock coard should be to stack with vias hole to short gnd connection between the Gnd of the two boards. I don't know if RyanJ can easily adding vias holes with him soft ? If so need to make some vias hole around the board, the closest but not near a polarized pin of a cap or near a signal or power lead...
RyanJ it's ok for you ? Need help ? had time to try to convert a screen into gerber files ?
Thank you at least for your work
Hi Eldam,
The board is coming along nicely. My knowledge in the software is limited but i'm sure it will suffice. One small issue i'm having in the size of the vias for ground stitching , they all come in the one size - big. I was hoping to find the really tiny ones somewhere in the TINA Component library but no luck finding it yet. Anyone know what category it would be under? Its not in the vias category.
Ryan
Hi RyanJ,
I had been looking at a TDA1540 pcb I have from a marantz CD45. In the 80s', Philips & Marantz maid top continuous plane with gnd strips around or below the TDA chips. But the burried vias was not conductive like the multiple micro golded vias we see nowadays on a strip gnd or a "island" gnd layer in the modern pcbs like the little smart Subbu V3 e.g.. Instead the vias was just holes and top & bottom was connect with a solid wire (like a cap lead) and soldered
. It was known that some old Philips Players were working better when you resoldered those vias !Well my low understanding after readings many links Marce had the kindness to give us in different threads these days is:
pin 15: not routed between the 2 gnd strips, but the power vias in the continuity of the dac body with a little strip to go further than the two pins above for the cap sync in the bottom right side of the chip. On the strip & near the pin (before the vias for -15V) a 90° pads for a smt caps.
pin 14 : DGND connect on the continuous plane
In the bottom : continous layer between the DEM pins of the two sides with multiples burried vias in the middle & in the length of the layer for joinning the top continous plane; the pin 4 AGND is connected also below and on the top.
pin 5 : fourth u.fl connection for the silmutanous mode : // to the 3 others I2S and stgraight traces if you can. the best is to make those low widthed (Impedance matched if you can like Set3up advised). Here I believe the gnd layers between the signal strips should be on the same width also (my understanding ?!); width a cut trace in the midle of each gnd layers to be SOTA (each side of each signal trace has its own strip of both sides of its width; the cuted strip do separate each gns strip between the signal strips... sorry for my english...hope it's clear !
But just a larger gnd layers between the signals strips are "good enough" for us... So the four uf.l connector are closer to each others. If possible 2 or " cm (sorry for the international measure scale ) Simple and elegant ! between the pins and the uf.l connector with smd pads in serie for the resonances or I2S attenuation close to the tda pins. If burried additional vias for flat layers on the end of the sifnals and gnd strips : the holes has to be on the middle of the pad where the uf.l will have to be soldered (it will not change the inductance but if you let the strip continue on a side like you did on you last drawing): If possible and if you find it it's the best way for people to use flat wire if they don't find daughter boards like Fifo with u.fl wires. But If you don't find it on your soft, it doesn't matter : uf.l connector is the priotity as you need personnaly those connectors and of course the global quality will be better. I'm trying to find a non to expensive XMOS USB to I2S daughter board for matching the low budget for the ones who want to keep it low (no FIFO, no tubes, no expensives master clock.the two current signal strips win to be routed under the chip and in its continuation to avoid power or signals crossing on both sides (or Marce advise), to be close in length also. So the first decoupling smt pads of the chip have to be not below on the added layer gnd but on the TOP continuous gns layer on each sides, if possible at 90° to the power strip vias.. no too near also, the decoupling smd do the job with 605 case size, the quality of the main power caps is too have low inductance (polymer caps with 2 mm pits leads) more than low ESR !
the configuration pin is floated as you notices with Andrea or Set3up.
I believe for the Andrea and people who will go with master clock or little daughter clock board selled by Ian canada : a little signal strip to the adhoc tda pin is needed with a vias on it and with an another burried vias close to it for the return gnd signal... The NDK is less noisy than the crysteq in the audio band and could be less expensive than the specia laptech maybe... each can choose its own curry to match the main tda dishes !
Whishes : if possible a smd 90° trace on the current signal strip for passive i/v with the gnd layer and vias holes to stack a daughter output board; idem burried vias for the gnd to connect the gnd of the daughter borad if stacked as the rule is each signal, voltage, current need the nearest way to come back at the emitter ! connectors also works with trough holes for solderind output stage board.
Voilou, don't know if it helps ?! C'est vraiment 2 cents, but I passed time to read documents as I can't not draw for the moment (but hope to try next months with the Abraxalito fellow plateform (TDA1545 kit thread by Audiolapdance) or the Vanofonk one (a little expensive maybe but good first solution to simplify printing and GB).
I had seen the AMR CD 77 photograph on sixMoons audio reviews... funny, one of the the best CD player in the world : look at the special msb caps ? they are not ceramics, tantals maybe ?! And old layout technic : each side of the dac chip and a little far with the pins ! The master clocks idem ! They use old Sanyo SP caps (better than the new ones subjectivly) for the bigger digital, special I2Y caps as well
6moons audio reviews: Abbingdon Music Research CD-77 and AM-77
So we are not to have too big head aches or give too much of your free time (thank you to share it
). IHMO the hardest is the I2S quality layout and no signal & power crossing and good multiple connections betwwen the little gnd layer and the bottom continous layer !I hope if we success to make gerbers files, anothers fellows will continue to increase its quality with V2, V3 and so on. It would be fun, sharing friendly and efficient (merging sharing, knowledge, hobby
) . Why not a futur 4 layers, we can dream... the cost goes very low these days !To be continued... Thanks Ryan
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