Why would you want to do this when the Amanero (with FW update) can take external clock?
I didn't know that. i remembered a post a 2-3 weeks ago that you made when you talked about removing XO's. So with new firmware, the board will just work straight off?
Also, is the local clocks on the amanero disabeled as soon as you have external MCK input, or do you have to do something else?
Firmware update from Amanero is required, mclk input and clock select output will be via the current mute/dsdoe pins on the header. Selecting external clocks in firmware setting will disable onboard clocks. You will need a different isolator for the 2ch isolator, I think acko described that in his earlier posts too.
Isolator/Reclocker and Dual Clock Boards
A brief tutorial for those who may be confused by the 'complexities' and the use with the ES9012/16/18 DACs.
The AKL-AMN-SXX board (Isolator/Reclocker) has two functions rolled into one:
1. Isolation of the digital signals-prevents noise from PC-USB side getting into the DAC side (but introduces jitter in the process).
2. Re-clocking to align the signals to a low jitter external reference clock (RCK). In this way the jitter effect above is minimized by the action of the reference clock and the FF switching.
It does not matter what the format is (I2S, DSD etc), both benefit from the re-clocking action. And, if the reference clock is synchronized with the transport clock, further benefits of synchronous clocking are achieved.
The AKX302 board (Dual Clock) is a separate module and supplies the low jitter reference clock (RCK) to the AKL-AMN-SXX board. Of course it can also supply MCLK to the DAC. 9012/16/18 DACs can take up to 100MHz. So for synchronous frequencies you should select 98.304Mhz for the DAC Master Clock (MCLK) and the AKL-AMN-SXX reference clock (RCK). Now, to synchronize with the transport master clock that uses 24.576MHz clock we must divide the 98.304MHz by 4. The divider circuit is also on the AKX302 board to make this easy and the divided output comes out on a coax line and this goes into the clock input of the Amanero.
As you can see the Amanero USB uses 2 clocks, one the 24.576MHz (for 48Khz base) as above and 22.5784MHz (for 44.1KHz base). It switches (selects) between the two depending on the sample rate of the source. So we need to match this on the DAC side with a second clock of 90.3136MHz on the AKX302 board and use the clock select line from the Amanero to switch accordingly. So the reason for a Dual Clock XO like the AKX302.
The best results for 9012/16/18 DACs would come from the Full Sync Mode as shown in the last two pages of the App Notes but it is also the most elaborate. For this setup you will need both the AKX302 and AKL-AMN-SXX boards as they work together to achieve the above.
Hope this helps!
A brief tutorial for those who may be confused by the 'complexities' and the use with the ES9012/16/18 DACs.
The AKL-AMN-SXX board (Isolator/Reclocker) has two functions rolled into one:
1. Isolation of the digital signals-prevents noise from PC-USB side getting into the DAC side (but introduces jitter in the process).
2. Re-clocking to align the signals to a low jitter external reference clock (RCK). In this way the jitter effect above is minimized by the action of the reference clock and the FF switching.
It does not matter what the format is (I2S, DSD etc), both benefit from the re-clocking action. And, if the reference clock is synchronized with the transport clock, further benefits of synchronous clocking are achieved.
The AKX302 board (Dual Clock) is a separate module and supplies the low jitter reference clock (RCK) to the AKL-AMN-SXX board. Of course it can also supply MCLK to the DAC. 9012/16/18 DACs can take up to 100MHz. So for synchronous frequencies you should select 98.304Mhz for the DAC Master Clock (MCLK) and the AKL-AMN-SXX reference clock (RCK). Now, to synchronize with the transport master clock that uses 24.576MHz clock we must divide the 98.304MHz by 4. The divider circuit is also on the AKX302 board to make this easy and the divided output comes out on a coax line and this goes into the clock input of the Amanero.
As you can see the Amanero USB uses 2 clocks, one the 24.576MHz (for 48Khz base) as above and 22.5784MHz (for 44.1KHz base). It switches (selects) between the two depending on the sample rate of the source. So we need to match this on the DAC side with a second clock of 90.3136MHz on the AKX302 board and use the clock select line from the Amanero to switch accordingly. So the reason for a Dual Clock XO like the AKX302.
The best results for 9012/16/18 DACs would come from the Full Sync Mode as shown in the last two pages of the App Notes but it is also the most elaborate. For this setup you will need both the AKX302 and AKL-AMN-SXX boards as they work together to achieve the above.
Hope this helps!
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I thought there was a plan for CPLD_Slave 45.xx/49.xx mode but firmware for this may not have been released. If this happens, then use the div/2 outputs on the 90.xxx/98.xxx AKX302 (and 9012/16/18 DACs)
Also, if you are using 9023 DACs then upper limit is 50MHz, so synchronous frequencies for AKX302 Dual XOs are 45.1568MHz/49.152Mhz and div/2 to Amanero. If CPLD_Slave 45.xx/49.xx becomes available then divider cct is not needed for this case and use the direct output to Amanero (same as DAC MCLK and Reclocker RCK). Of course you could also use 9012/16/18 DACs with this 50MHz setup.
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So does this mean I can do something like this...
Async mode with Re-clocking with a 100Mhz XO on AKX302 feeding RCK on AKL-AMN. Then XO on DAC board. i.e. Pg. 4 on App Notes.
or this…
Pseudo-Sync mode with Re-clocking with a 100Mhz XO on AKX302 feeding RCK on AKL-AMN; Div/2 (49.152Mhz) off of AKX302 to MCLK on 9023. Would this be called what you're calling Turbo PSync?
So many choices!@$^^@! What to do!?!
Yes, exactly as shown on Pg4. I have reloaded the App Notes.
Use any transport or DAC and no modifications on either required. A very simple setup.
This is correct for the 9023 DAC but if 100MHz XO on AKX302 is used you will get 50MHz with a div/2 and not 49.152 as you have indicated
There are many different options to cover everyone's needs, so choose what is best for your setup and may ignore other modes.
If in doubt please post your setup and will try my best to help out
Got my setup working with full sync mode with SI590 7 ppm clocks, the frequency displayed by the dac is not correct, using the 98xx and 90xx frequencies. the dac has full lock and plays without artifacts, no clicks or pops. Any ideas why synced frequency displayed would be different than async ? I am using a 100 MHz clock for the on dac xo.
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It is not full sync mode if you are using a local 100MHz clock on the dac. Full sync means that you don't have a local XO on the dac, and only the external on the AKX302-board - feeding the amanero, the isolator/reclocker AND the dac. For full sync, you have to remove the regulator for the dac local clock.
Well done, you beat us all!
As for the freq display from DAC, I remember 'GLT-Hifiduino' mentioning somewhere that when snyc mode is used with EES DACs the DPPLL cannot figure out the Fs correctly and will be all over the place! I think this is what you ae seeing. In this case it is more reliable to get Fs from the transport itself. I know transports like EXA2UI and WaveIO have indicators for this but not sure if we can read the i2c port of Amanero for Fs information.
Also, have you tried lock with the "Lowest DPLL BW setting" on the DAC? This should give better jitter reduction and further improvement in SQ
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