Hi, thanks for the replies! Let me explain what I´m up to.
I am planning a NOS DAC with TDA1541A. The DAC will be clock master and will put out a spdif signal to slave my soundcard (RME Digi96). I will use toslink optical I/O. The DAC will be strictly 44.1 KHz.
I would like to use CS8402 for simplicity and DIP package. But I don´t have it and it´s hard to get, so I may go for newer chips. I will try to describe my clocking ideas below.
CS8402 will be in format 0, so only MCK at 128fs is needed to transmit. Transmitted data will probably be all zeros. The CS8412 will be in format 3 (fsync and sck are inputs). At this point, there are different ways to go:
1)Use XO at 128*fs (MCK for CS8402). Divide to get 64*fs (sck) and 1*fs (fsync). Feed sck and fsync to CS8412 and DAC at once.
2)Use XO at 64*fs. Feed directly to sck input of CS8412 and DAC, for lowest jitter. Multiply by 2 to get 128fs for MCK of spdif TX. Fsync derived from the 64*fs.
3)Use a higher XO frequency like 256*fs, divide to get all the other frequencies (MCK, SCK, FSYNC). Synchronously reclock all 3 signals entering the dac chip (SCK, FSYNC, SDATA). The flip-flops in this case would be clocked directly from XO.
Option (1) is what I´ll try first, using synchronous counters like HC163. Option (2) is appealing to me because of clocking DAC directly from XO, and also because I´ll learn about PLLs. Option (3) is also interesting...
I am open to all ideas and suggestions. What you think would be best?
Regards,
Alexandre
PS: Somebody has a spare or two of Crystal CS8402 spdif transmitter???
I am planning a NOS DAC with TDA1541A. The DAC will be clock master and will put out a spdif signal to slave my soundcard (RME Digi96). I will use toslink optical I/O. The DAC will be strictly 44.1 KHz.
I would like to use CS8402 for simplicity and DIP package. But I don´t have it and it´s hard to get, so I may go for newer chips. I will try to describe my clocking ideas below.
CS8402 will be in format 0, so only MCK at 128fs is needed to transmit. Transmitted data will probably be all zeros. The CS8412 will be in format 3 (fsync and sck are inputs). At this point, there are different ways to go:
1)Use XO at 128*fs (MCK for CS8402). Divide to get 64*fs (sck) and 1*fs (fsync). Feed sck and fsync to CS8412 and DAC at once.
2)Use XO at 64*fs. Feed directly to sck input of CS8412 and DAC, for lowest jitter. Multiply by 2 to get 128fs for MCK of spdif TX. Fsync derived from the 64*fs.
3)Use a higher XO frequency like 256*fs, divide to get all the other frequencies (MCK, SCK, FSYNC). Synchronously reclock all 3 signals entering the dac chip (SCK, FSYNC, SDATA). The flip-flops in this case would be clocked directly from XO.
Option (1) is what I´ll try first, using synchronous counters like HC163. Option (2) is appealing to me because of clocking DAC directly from XO, and also because I´ll learn about PLLs. Option (3) is also interesting...
I am open to all ideas and suggestions. What you think would be best?
Regards,
Alexandre
PS: Somebody has a spare or two of Crystal CS8402 spdif transmitter???
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