Hi,
I plan to follow your schematic but I have to wait for a long time for the parts. So with what I have in my hand, I come up with a schematic that I can build for testing. I made it like an preamp and test in my system. Do you think it is worth to test or I just need to wait for the parts and build the correct schematic?
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The input stage is OK, but output is not in line with my priciple (the load is in parallel to ACTIVE device). In your case it is parallel to current source. You should put p-channel MOSFET downside, and the CCS above it.
This is strange thing to say. The load is connected via caps to the output and parallel to both, CCS, and active device via power supply caps. I don't see an advantage in your configuration, could you elaborate?
An answer is visible from your question - with the standard emitter (source) follower, everything contributes to output signal current (active device, PS caps, wiring to diode bridge when they conduct, wiring to transformer, trafo itself, etc.). With the standard approach, one gets standard "transistor" sound, with some better-worse variations. Just try my proposal - every stage is cut off the PS rails signal-wise by schematics, not only by caps. In this case I get what I like from sound (maybe it is only my preference). Very good sound is hidden in details, not in rough simulations.
This configuration renders the current draw from the supply constant, limited only by the output impedance of the current source. Thus the load-induced supply ripple should end up being a LOT lower than when the load's in parallel with the current source.
As Vladimir has pointed out this is a principle adopted by Andrea Ciuffoli and explained here : the Power Folllower
Yes I know that(I know about Cuiffoli buffer for log time), but is this supported with some real life measurement or it's just a subjective opinion?
Other diode strings are zeners, just select and adjust for voltage needed. The lowest noise/voltage ratio is for 5...7V zeners, typically.
The notion for mosfet kind, is used in wikipedia, it is not specially mechanical term:
"If the MOSFET is an n-channel or nMOS FET, then the source and drain are "n+" regions and the body is a "p" region. If the MOSFET is a p-channel or pMOS FET, then the source and drain are "p+" regions and the body is a "n" region. The source is so named because it is the source of the charge carriers (electrons for n-channel, holes for p-channel) that flow through the channel; similarly, the drain is where the charge carriers leave the channel."
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Hello Vladimir,
here is my contribution. I sent schematics and layout for comments and check.
The rendered view is how it should like: make this design accessible for anyone, ok, the parts needs to be available! Happy to use russian parts.
Regards,
Jean-Paul
here is my contribution. I sent schematics and layout for comments and check.
The rendered view is how it should like: make this design accessible for anyone, ok, the parts needs to be available! Happy to use russian parts.
Regards,
Jean-Paul
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