192KHz 24bit DAC No oversampling and No digital filter

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A

audiodesign

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I would like to create a project to play high resolution materials like the 24bit 192KHz Studio format buy from Linn Records - The best recordings in Studio Master Download, Vinyl and SACD and 2L - the Nordic Sound.

Offcourse this should play also low resolution materials like the cd ripped.

I am thinking to use a 192KHz 24bit usb to spdif interface like these and get I2S signals:

HLLY MUSILAND Monitor 01 US HI-FI Mini USB sound card su eBay.it Speakers, Computer Accessories, Computers Networking

M2Tech

After the good experience with the AD1865 but able to play only low resolution materials at 16bit 44KHz:

DAC End - the AD1865N-K with single ended vacuum output stage

DAC End 2 - the AD1865N-K with single ended vacuum output stage

I have decided to create thisproject with the same concept:

No oversampling and No digital filter

I will use a CS8416 followed by a AD1896 to resampler all the I2S input to 192KHz 24bit and after a direct connection to the PCM1704 (inv port for left ch).

Off course will be used a passive I/V with a 50ohm MK132 Caddock and vaccum tube stage with the D3a in triode connection and loaded with CCS.

A group buy will be created to produce teh pcb.
 
A

audiodesign

Banned
Joined 2005
Fabian Sigg have published an article about the use of PCM1704 in a no oversampling configuration.

He think to be necesssary a delay circuit to get 2 syncronized latch signals for the two channels (L & R).

Justblair's Audio and Electronics Pages: Creating a DIY non oversampling DAC with PCM1704

and the last circuit is on:

Justblair's Audio and Electronics Pages: A universal shifting circuit for interfacing decoder X with converter Y.

Eric Juaneda have develop a pcb board with the same concept

High End Audio - Digital decoder for NOS DAC

Someone have used a simple direct connection with an inv port like for some AD1865 circuits (see attached file).
 

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R

regal

Member
Joined 2004
audiodesign said:
No oversampling and No digital filter

I will use a CS8416 followed by a AD1896 to resampler all the I2S input to 192KHz 24bit and after a direct connection to the PCM1704 (inv port for left ch).

Off course will be used a passive I/V with a 50ohm MK132 Caddock and vaccum tube stage with the D3a in triode connection and loaded with CCS.

A group buy will be created to produce teh pcb.
Click to expand...

Is it a good idea to resample all formats to 24/192 without dithering as a digital filter would do?
 
M

Marek

Member
Joined 2003
I'm using this flip-flop glue logic circuit with AD1865 with success and I'm currently building PCM1704 balanced (2 or even 4xPCM1704 per channel) using the same flip-flop circuit.

Remember that using AD1896 makes you DAC digital filtered. Also note that in output master mode AD1896 can resample up to max 96kHz not 192kHz..
 
A

audiodesign

Banned
Joined 2005
Read this note of Sampler on the other forum:

sampler said:
Having a look at Audionote digital side solution, I agree that it is basically the same as DAC END2. Just a 2x propagation delays for data, as it is going thru HC02 gates. That’s maybe having something due to author’s worries about data being properly latched to DAC on FSYNC falling edge.

Well, I think the simplest way of solving this problem would be delaying right channel data exactly by 32 clk, and feeding FSYNC to both LL and LR. This could be accomplished by 4 x 74ACT164 8bit shift registers, without degrading data synchronization too much. These 74ACT are real fast, 6ns typ., so only 24ns delay for right channel data. If my logic is valid, all should work fine.
Click to expand...

http://www.diyaudio.com/forums/digital-source/111259-ad1865-best-dac-19.html
 
A

audiodesign

Banned
Joined 2005
ARG!

Serial Data Port Master Clock Modes
Either of the AD1896 serial ports can be configured as a master
serial data port. However, only one serial port can be a master
while the other has to be a slave. In master mode, the AD1896
requires a 256 ¥ fS, 512 ¥ fS, or 768 ¥ fS master clock (MCLK_I).
For a maximum master clock frequency of 30 MHz, the maximum
sample rate is limited to 96 kHz. In slave mode, sample
rates up to 192 kHz can be handled.
Click to expand...

ok, AD1896 will not be used
 
M

Marek

Member
Joined 2003
I'm using Justblair's circuit, this first one without channel alignment.
I'm using DIR1703 as SPDIF receiver, but with Cirrus it is simplier because you can set specified output word length.

about AD1896 it is grat device with very good jitter rejection, but if you want filterless it wil not fit.
 
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