class A Buffer

The output resistor gives a resistive element to any reactive load that is presented. This added resistance, mounted very close to the output pin of the mosFET, is a very effective method of stabilising an active stage.

Sims show high values affect the output voltage. I added a resistor, will experiment with the values. probably around 5-10 ohm should be ok.

There is a base stopper on one base lead of the 2Q CCS.
Is this the correct base that can benefit from the added stopper resistance?

I don't know, I am asking !!!

I am not so sure anymore. I thought i was correct, but then i checked on another thread and looks like I am not. So I think I will put both the resistors on the pcb atleast so that later i have an option for this.
 
New images with the output changes. Also cleaned up the input stage a bit more. Also added the ccs resistor.
 

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the Zobel is separated from the output by the new Zo of 10r (20r||20r).
This makes the Zobel effectively 20r+100nF.
This may turn out to be a good value to use. But I don't know what this output stage requires.

two 20r 600mW can pass 173mAac each for a total output of 346mAac
two 1/4W can pass a total of 224mAac
These seem to be very high output currents. Why have you chosen doubled resistors?
A single 10r 1/4W passes 158mAac, or 224mApk.

Many low load impedance driving line stages use 10r to 100r as Zo and some 600ohm capable stages use 50r.
 
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two 20r 600mW can pass 173mAac each for a total output of 346mAac
two 1/4W can pass a total of 224mAac
These seem to be very high output currents. Why have you chosen doubled resistors?
A single 10r 1/4W passes 158mAac, or 224mApk.

I want to experiment with this for a low power amp also (maybe a couple of watts, with higher Iq current and bigger heatsinks of course), hence the high power resistors at output, for the hpamp build, i will populate only one resistor of correct value.

the Zobel is separated from the output by the new Zo of 10r (20r||20r).
This makes the Zobel effectively 20r+100nF.
This may turn out to be a good value to use. But I don't know what this output stage requires.

Many low load impedance driving line stages use 10r to 100r as Zo and some 600ohm capable stages use 50r.
I will do some research and find out the network values.

not sure how such high values work. If my calculations are right, for 100mw into 32 ohms, I need around 56ma of rms current, which across a 50 ohm resistor will drop about 2.8v rms, which is more than the voltage available. I will need a gainstage for low impedance loads also with a high Zo, probably I should stick to about 5R or less for this, it helps with the zobel and the thiele network resistor values also.
 
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The Zobel is a High Frequency load.
It becomes the sole load when there is no other HF load.
This could be when the output is disconnected, or when the output has an inductance in series with the load.

The Zobel is needed if the circuit misbehaves when there is no defined HF load.
The need for the Zobel has nothing to do with Zo.
 
Circuit is not misbehaves due to absence of load. It misbehaves due to reactive part of load's impedance that can turn amplifier into kind of colpitts oscillator. Simple serial 10 Ohm will damp enough load's reactive impedance in such circuit without additional elements. However me don't like concept of having such amplifier with Zo=10 Ohm, this kills the whole idea of buffer IMHO. But I understand that without it such amp will not like load shorting..
 
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Zo is NOT to prevent damage due to shorting or other abuse.

Zo is one of the best ways of isolating the output from reactive loading.

If you can guarantee only resistive loading in the range acceptable to the circuit, then Zo is never required.

Zo can be any value. The Designer chooses a value to suit the circuit and to suit the load.
0r05 to 0r22 are a typical range for Zo on a power amplifier. But you rarely see this implemented. Designers find other ways to avoid the power loss that would appear in the advertising blurb.

A Buffer is an amplifier.
Power losses in advertising blurb is not usually an issue.

eg. 10k Receiver impedance with a sensitivity of 1.3Vac for maximum power output.
What power is absorbed by a Buffer Zo of 1r0? and 10r? and 100r? and 1k0?
Have you ever seen this as an issue?
 
Issue of Zo=10 Ohm is not absorbed power, issue is damping factor that with 10 Ohm will be too low even with 60 Ohm heaphones.
Damped inductance + Zobel do reactive load decoupling fine, so that separate 10 Ohm is redundant. Or Inductance + Zobel redundant. Peek any and throw away...
 
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Forget "damping factor".
Instead think : required source impedance?

What does the headphone manufacturer suggest as a suitable source impedance for your headphones?

BTW,
Doors makes no mention of building a headphone amplifier.
He talks only of a Buffer.
 
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We're in Headphone Systems though, so I'd assume it's supposed to be used for driving headphones.

It is true that damping factor is more of a rule of thumb affair. If in doubt the effect depends on how much load impedance actually varies. In some cases impedance response is so flat that D < 1 (i.e. source impedance exceeding nominaly impedance) does not pose any kind of major problems, while picky loads may require D > 5 (e.g. Sennheiser HD5x8, some multi-driver BA in-ears are even worse). And then there's those headphones that sound their best at non-zero source impedance (e.g. HD800, Beyer T1).
 
I would not make R3 any bigger than absolutely needed though, 1k max. You can easily get NP0 caps for C1 up to about 680 pF.

whats the lowest r3 can go. What about 100R and 4.7nf.

What about this kind of filter using c3 and r7 in kuartlatron in this link.

That may point to having a switchable Zo.
22r, with a parallel 22r for 11r and a parallel 4r7r for3r9
and both switched in for 3r3

Added a switch for the second resistor.
 
Should work, maybe a bit overkill even (basic circuit PSRR ought to be workable as-is).

Do you mean to say a crcrc is enough, whats the best option for power supply for this (barring those big expensive chokes, anything else is ok). I searched but didnt find much info, only that the follower with ccs has a lot better psrr than the follower. I see all kinds of supplies being used for similar circuits. How do I go about determining the psrr of the circuit or some kind of a target for the psu design, like whats the max ripple, max output impedance etc it should have. Any good site/thread on this?
 
whats the lowest r3 can go. What about 100R and 4.7nf.
A source may end up kinda unhappy when asked to drive that kind of load. I rather wouldn't go above 1 nF, besides 820 pF is about the largest that you'll commonly find NP0 caps in anyway. Purely from a follower distortion POV, the less R the better. Which also is why I have suggested a pre-buffer earlier in this thread.
Do you mean to say a crcrc is enough, whats the best option for power supply for this (barring those big expensive chokes, anything else is ok). I searched but didnt find much info, only that the follower with ccs has a lot better psrr than the follower. I see all kinds of supplies being used for similar circuits. How do I go about determining the psrr of the circuit or some kind of a target for the psu design, like whats the max ripple, max output impedance etc it should have. Any good site/thread on this?
It's rarely a bad idea to hack the circuit into LTspice (or the like) and sim it. That should give you some clues. As for understanding of the whole affair...

-PSRR of a follower
is given by the ratio of current source impedance and follower output impedance. A voltage divider, basically.
This is why it is much better with a current source (at least kOhms range, typ) vs. a resistor (18-33 ohms, typ) - output impedance for such a MOSFET buffer sims at 1-2 ohms depending on standing current. No difference for single-supply circuits obviously, as V- = GND there.

+PSRR of a follower
is essentially the same in both cases. Typically maybe 40 dB or so. It is a result of device gain.

Look at it this way:
A common-emitter/source amplifier provides gain but no PSRR.
An emitter/source follower provides no gain, but there's PSRR instead.

So PSRR in a follower is nothing but amplification in disguise. When you run a common base (gate) amplifier in reverse, its voltage gain becomes voltage attenuation, and that's essentially what is happening here.

The demands are very similar to those of, say, a good current source or VAS transistor. Higher gain (beta / gm) with little droop at higher currents and higher Early voltage Va are benefical statically, and less feedback capacitance Ccb (higher fT) is beneficial dynamically. (Note that in BJTs, higher beta tends to lead to lower Va and higher Ccb.)

We're always talking about the three basic kinds of circuits, but at the end of the day, all a transistor cares about is currents, voltage differences and impedances at its 3 terminals. We are merely looking at it from three different perspectives, and it can be useful to switch from one to another.

Note that PSRR considerations are always linear - when supply at the follower dips below maximum output amplitude, you're always going to be screwed no matter how large PSRR had been before (because at that point, it's pretty much going to collapse). Which is why passive filtering is not dead even in the days of regulators with 120 dB worth of PSRR.

Speaking of supplies, along with voltage attenuation comes an impedance transformation that knocks down even comparatively large supply impedances. The limiting factor for supply impedances is usually going to be the effect in the last paragraph instead.
 
I simmed a rcrcrc supply, +ve rail only, pics with 20hz and 20khz load and asc file are attached.

I will be using an EI ransformer 18-0-18, 3A.
Load is for 2 channels, 0.5A DC and 250ma a/c

20hz signal at output - 450mv p2p
20khz signal at output - 20mv p2p

100hz ripple - -65db
resistors dissipate avg power - R5 - 1.7W, R6 - 1.56W, R7 - 1.4W. I plan to put 3 2w resistors for each.
 

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I am surprised how high your ripple prediction is reading. Looks to like nearly 1Vpp
That will measure as ~300mVac on a DMM.
your load is 1Adc.
you have 19mF, I would expect much lower.

That is poor.

Why the spike at 20Hz?

The load is 20hz, not DC (well, its 500ma dc for bias and 250ma 20hz for signal for 2 channels). In the other pic, its 20khz
At DC load of 750ma, its around 2mv.
 
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