With all these concern of the double and triple, won't MOSFET be a better choice? I am working on my design and I am swaying more towards MOSFET. This is my understanding so far:
1) You don't need to stack them up like triple.
2) The pre-driver doesn't have to drive DC current with MOSFET like BJT. You just have to worry about enough current to get the slew rate required.
3) Like in p233 of the book, using source resistor of 0.15 ohm and 0.22 ohm for IRFP240 and IRFP9240 resp lower the droop quite a bit and a lot more gentle compare with BJT even when they are optimized to have emitter resistor to drop 26mV. The MOSFET definitely have advantage in the crossover distortion department. Increase idle current also improve cross over distortion. Crossover distortion remains the same for BJT remains the same regardless of idle current, high current just spread the bump in the middle wider.
4) Beta of BJT drop as the voltage swing away from the 0V because the current increase. Then the input capacitance increase and slow the slew rate. This is distortion that is swing dependent and not depending on frequency. This is as bad as crossover distortion. This cannot be cure by giving more headroom at the rail by increasing the rail voltage. With MOSFET, you can increase the headroom by using a higher rail voltage to keep the VGD larger than 10V to keep the CGD down. Doing that, the distortion due to voltage swing of MOSFET should be a lot lower than BJT.
5) fT of BJT droop on high current, that might have a little of the similar effect like 2) above because -3dB corner frequency of the beta gets lower on high current.
6) It is my guessing that if you put a low value resistor in series with the drain of each MOSFET and use individual gate stop resistor for each MOSFET all point to point on each MOSFET, it should tame the oscillation problem.
The only thing I think the MOSFET has a disadvantage is higher output impedance because of the low gm.
Please correct me if I am wrong.
Thanks
1) You don't need to stack them up like triple.
2) The pre-driver doesn't have to drive DC current with MOSFET like BJT. You just have to worry about enough current to get the slew rate required.
3) Like in p233 of the book, using source resistor of 0.15 ohm and 0.22 ohm for IRFP240 and IRFP9240 resp lower the droop quite a bit and a lot more gentle compare with BJT even when they are optimized to have emitter resistor to drop 26mV. The MOSFET definitely have advantage in the crossover distortion department. Increase idle current also improve cross over distortion. Crossover distortion remains the same for BJT remains the same regardless of idle current, high current just spread the bump in the middle wider.
4) Beta of BJT drop as the voltage swing away from the 0V because the current increase. Then the input capacitance increase and slow the slew rate. This is distortion that is swing dependent and not depending on frequency. This is as bad as crossover distortion. This cannot be cure by giving more headroom at the rail by increasing the rail voltage. With MOSFET, you can increase the headroom by using a higher rail voltage to keep the VGD larger than 10V to keep the CGD down. Doing that, the distortion due to voltage swing of MOSFET should be a lot lower than BJT.
5) fT of BJT droop on high current, that might have a little of the similar effect like 2) above because -3dB corner frequency of the beta gets lower on high current.
6) It is my guessing that if you put a low value resistor in series with the drain of each MOSFET and use individual gate stop resistor for each MOSFET all point to point on each MOSFET, it should tame the oscillation problem.
The only thing I think the MOSFET has a disadvantage is higher output impedance because of the low gm.
Please correct me if I am wrong.
Thanks
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Hi David,
I'm not sure there is excess phase - assuming we define it as more phase than a proper version of the minimum phase network representation of the circuit. Such excess phase would be kinda sorta like time delay, and pure time delay over these distances is going to be quite small.
It is much more likely that there are many, many more poles than we are accounting for, many pretty high in frequency. A large spread of many such poles is really hard to distinguish from excess phase. Think about how much phase shift a 100MHz pole contributes at 10MHz. Now think about sprinkling in about 10 of those poles. And we haven't even talked about stray zeros yet
. But some of those could be argued to be contributing non-minimum phase.Cheers,
Bob
Hi Mike,
Sorry I slipped up on your name. I hate those Freudian slips.
Don't be so negative. Just try simulating it. Be nice. We are not competitors. I am not doing any "because I say so" thing. Be an honest and helpful contributor. Do I get it wrong sometimes? I sure do. Others do too. That's called honest communication. Its healthy for us to not fear saying something wrong as long as we are not being irresponsible. Heaven help anybody who fails to say something out of fear of being attacked by you. I'm not afraid to admit that I like to look at frequency response peaks in an emitter follower for signs of instability.
I did also say that the VAS output impedance can be complex and something that has to be looked at also. But most of us mortals need a starting point from which to begin, perhaps one where there is some simplification, like first treating the OPS and VAS separately. We always have time to later put them together after we have gained some insight.
You should try more such simulations as I described before being so negative and contrarian in commenting about others' posts that are an honest attempt to convey understanding to those others who may not be as brilliant as you.
We all know how "smart" you are, even if you don't think you have to back up what you say with anything other than more verbiage.
There is always more than one way to skin a cat, some more accurate than others, some lending more insight than others. If you want to show and properly explain your approach and its results, please do. But while doing that, if you do it with a Middlebrook or Tian probe, make darned sure you don't make mistakes in doing so, and try sanity checking your results with other approaches.
Cheers,
Bob
Waly: can you explain the subthreshold conduction slope in this datasheet in figure 11?
http://datasheet.octopart.com/IRF540-Philips-datasheet-97864.pdf
I estimated 225mV/decade. This corresponds to a source resistance per Vgs slope of -1 octave per ~75mV, as opposed to the emitter resistance per Vbe slope of BJTs of -1 octave per 27mV.
Excess phase:
The LTSpice BJT model has a parameter for modeling excess phase. From the LTSpice help file:
Just in case that's relevant...
mV per decade and Re per octave are two different measurements.
MOSFET subthreshold Vgs: ~200mV per decade of Id or more. (But only in the subthreshold region!)
BJT Vbe: 60mV per decade Ic, very little variation between devices.
The Rs of a MOSFET falls by 1 octave per 75mV Vgs or more. (again, only within subthreshold conduction!)
The Re of a BJT falls by 1 octave per 25.85mV Vbe, rising by 86.2nV per degree C.
The latter figures are what determine the optimal emitter resistance for an EF output stage, for exponential-law devices. But for MOSFETs this only works as long as you stay in the subthreshold region, which will probably mean operating below 50mA.
http://datasheet.octopart.com/IRF540-Philips-datasheet-97864.pdf
I estimated 225mV/decade. This corresponds to a source resistance per Vgs slope of -1 octave per ~75mV, as opposed to the emitter resistance per Vbe slope of BJTs of -1 octave per 27mV.
Excess phase:
The LTSpice BJT model has a parameter for modeling excess phase. From the LTSpice help file:
LTSpice help file said:
Just in case that's relevant...
AndrewT said:
mV per decade and Re per octave are two different measurements.
MOSFET subthreshold Vgs: ~200mV per decade of Id or more. (But only in the subthreshold region!)
BJT Vbe: 60mV per decade Ic, very little variation between devices.
The Rs of a MOSFET falls by 1 octave per 75mV Vgs or more. (again, only within subthreshold conduction!)
The Re of a BJT falls by 1 octave per 25.85mV Vbe, rising by 86.2nV per degree C.
The latter figures are what determine the optimal emitter resistance for an EF output stage, for exponential-law devices. But for MOSFETs this only works as long as you stay in the subthreshold region, which will probably mean operating below 50mA.
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Wrong name again.
You didn't add anything but personal comments and another layer of "I know better" mantra to the topic, without bringing any clarity to the technical matter. Please do so (like how to simulate the input cap effect on the triple stability, with an example schematic and some relevant results).
If you can't afford to spend the time required to support your statements, then do say so, everybody would certainly understand, but you could at least provide some supporting references. From this perspective, a lead-lag network compensating the Miller loop is known for over 50 years in the technical literature (references available upon request), helping stabilize the output stage is not. You are not excepted from proving any of your outstanding statements.
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IRF540 is a trench mosfet. By the nature of the trench mosfet geometry (having VERY wide vertical channels, because the channel length is defined by diffusions rather than self aligned as in regular planar mosfets, also requiring a thicker gate oxide compared to the planar devices), the ratio of Cd/Cox is large enough to amplify the theoretical 60mV/decade (see the formula I provided, 60mV/decade is when Cd/Cox << 1) to those unusual values. Trench mosfets are otherwise strictly switching devices, so nobody cared to optimize the subthreshold behavior (the lower slope, the better). Such a large subthreshold slope is one good reason why I would not touch with a pole such a device for any analog applications.
For bipolars, when no critical issues are at stake (like in a bandgap reference) m~3 is a common value to consider (it's the XTI parameter in the bipolar Spice model) which would render an about 70-80 mV/decade slope. m (aka XTI) is a matter of device process, and it is incorrect that all bipolars will have the slope in this range.
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Hi Waly,
Yes, please provide those references. I always look to collect good references for my second edition.
I would remind you that the lack of reference to use of the VAS Zobel network for improvement of output Triple stability, or your failure to find such a reference, does not mean that the Zobel does not help Triple stability.
Be open-minded and think about how many drugs used for one malady have been found to be a big help for other maladies. Close-minded people who don't think outside the box and other such naysayers are not usually the ones who discover such things.
Cheers,
Bob
If by Rs and Re you mean the source and emitter resistance in mosfets and bjts, then those are fixed values depending on the device process and geometry, they don't depend on Vgs or Vbe. They are usually very small, in particular in power devices, and while they can be important at high currents, their impact on the mosfet subthreshold conduction, or in the bjt Ic-Vbe at equivalent low currents is very small.
The Barnie Oliver optimum bias point for bipolars has to do only with maximizing the flat gm region around the crossover region, avoiding as much as possible the gm doubling effect (in case of over biasing). If you imagine the distortions vs. bias, the curve aspect would be: decreasing tward the optimum, increasing when the gm doubles, then decreasing again at very high biases (class A). So is the equivalent gm around the crossover: high peak, flatting toward the optimum, peaking again when gm doubles, then flatting again in class A.
The intrinsic Re is important and is usually the root cause why the (distortion) optimum voltage across the external Re is different (smaller) than the theoretical 26mV. This is not to say I would bias an OPS at 10mV over the external Re, even if this value would show a measured minimum in distortions. There are other considerations beyond the Barnie Oliver optimum bias.
Hi Alan,
Much of what you have said is largely true. But as engineers we must pick our poison. And there is plenty of poison to go around in both MOSFET and BJT output stages.
I like MOSFETs because they are fast and are less susceptible to thermal bias problems. But their speed gives them a greater tendency to oscillation.
For a given output stage bias current, much lower THD numbers can easily be had with BJTs. This is due to the lower gm and resulting transconductance droop. Indeed, addressing that problem was why I applied Hawksford error correction to my MOSFET amplifier.
BJTs have also come a long way since then as well. BJT ft is higher and beta droop and ft droop are smaller. The availability of ThermalTraks has made BJTs much more competitive with MOSFETs in the thermal department.
I enjoy working with both technologies.
Cheers,
Bob
Waly
Mr. Cordell take his time here to help all of us. He wrote one of the best book I've read and believe me, I read A LOT OF BOOKS on electronics. I have 30 years of designing experience and two talk bookshelves of text books in my library to say this. I think you should be more respectful to Mr. Cordell.
Ummm, very late here... Really, one of the best electronics book in the last 30 years? I can think of a few that are probably playing in a different league, but I suppose you mean "DIY electronics" books? If so, I would agree.
Don't worry, your offensive arrogance will go away after you get some actual engineering experience. That tends to give you a lot more humility.
Could you further enlighten us unwashed on your reference choices? I'm sure we would be the better for it.
--Damon
Can you tell me what part I said is not true? I am still trying to learn.
I want to get your opinion. From my work with power MOSFET, I found putting a gate stop resistor point to point to the gate pin AND a small value like 0.5 ohm resistor right at the drain. This together with using source resistor like you suggested, I basically isolate each individual MOSFET and prevent them from interacting with each other. What do you think. Should I particular use wire wound resistance to add some inductance. This is like adding a ferride beat on the drain and gate. What do you think? Or put ferrite beat onto the drain and gate pin directly?
If you have the source degeneration resistor as you suggest, the graph in Fig.11.11 in page 233 looks better than the wingspread of the BJT.
Thanks for your time. I looked at the Thermal Trak BJT. It's just a BJT and a diode on the same die to have better thermal tracking. That would really help ONLY if you have one single pair of power complementary transistors. If you have more than one in parallel, how does the tracking diodes help? You parallel all the diodes of the NPN together and the PNP together? that does not seems to work very well!!!
Thanks
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I might be new in audiophile, I have been an engineer and manager of engineering for 30 years and published articles in AIP and own two patents in electronics. I have more books on RF electronics and EM than Stanford U book store. I designed analog IC like Mr. Cordell before. Yes, I stand behind what I said.
Mr. Cordell have my absolute respect.
Yours and others commitment in defending the sacred cows is endearing. Anyway, you killed my sleep, so here's a short list, in a random order:
- Analysis and Design of Analog Integrated Circuits by P. R. Gray, P. J. Hurst, S. H. Lewis, R. G. Meyer, 2001.
- Design of Analog Integrated Circuits and Systems by Kenneth Laker and Willy Sansen, 1994.
- Analog MOS Integrated Circuits for Signal Processing by Roubik Gregorian and Gabor C. Temes, 1986.
- Design of Analog CMOS Integrated Circuits by Behzad Razavi, 2000
- Analog Integrated Circuit Design by David A. Johns, Ken Martin, 1996
- The Art of Electronics by Paul Horowitz, Winfield Hill, 1989
- Operational Amplifiers: Theory and Practice by James K. Roberge, 1975
- Discrete-Time Signal Processing by Alan V. Oppenheim, Ronald W. Schafer, 2009
Many, many others, thinking about Jim Williams et. al... Good night.
I studied Grey and Meyer and I read some on the Razavi to say what I said. I have both of the books. So what is your point of putting out name on the text books?
I can't find to picture of this Operational Amplifiers: Theory and Practice by James K. Roberge, but if it has the 7 ways to tame the wild opamp or something like that, I had that book and studied cover to cover. It was a book strongly suggested to people back in 1982 when I studied that. I lost it since. It's a brown and yellow cover.
The reason I like Cordell's book is because he pull the knowledge of those other books together and concentrate on improving for audio power amplifier. You are supposed to read all those first to understand the basic circuit. You are supposed to know the basics of opamps and it's internal circuits already.
I can't find to picture of this Operational Amplifiers: Theory and Practice by James K. Roberge, but if it has the 7 ways to tame the wild opamp or something like that, I had that book and studied cover to cover. It was a book strongly suggested to people back in 1982 when I studied that. I lost it since. It's a brown and yellow cover.
The reason I like Cordell's book is because he pull the knowledge of those other books together and concentrate on improving for audio power amplifier. You are supposed to read all those first to understand the basic circuit. You are supposed to know the basics of opamps and it's internal circuits already.
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