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Support for Botic Linux driver

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M

miero

Member
Joined 2011
The ultimate goal is inclusion of this driver into standard Linux kernel sources, which would means direct availability in the future kernels and thus all new or updated distributions.

But before pursuing that I'd like to make it more universal by implementing in on the another SoC board that allows either master clock input or which has support for external bclk/lrck signals. So in the next year the external clocks might be supported also on Raspberry Pi and/or some board with i.MX...

So... there are no plans (and time) to support other distros directly by me.
 
ChrisMmm

ChrisMmm

Member
Joined 2005
Just to report what I have achieved.

I have managed to get upsampling to 96k on the BBB working with the version of Debian and Botic code that Miero has made available, using Squeezelite as streamer SW. Bit of effort involved there as LIBSOXR was not installed but all going now.

Additionally I have set up a NDK NZ2520SD 24.576mhz oscillator on the BBB J9 header feeding pin 25. The oscillator is powered by a low noise 3.3v supply.

Changed the clock setting to "2" - external clock for 48k only. So I am now outputing via I2S at 96k upsampled by the SOX code which has a good reputation compared to other resampling code and using a good, low noise clock. This enables me to feed my miniSHARC at the rate which it is running and avoids it having to do any upsampling as well as lowering the jitter out of the BBB (I hope - not measured!).

Again, all down to miero's code - thanks.
 
G

giulio

Member
Joined 2004
Hi Miero,

the next time you compile the kernel would it be possible to include the module snd-usb-audio? This way I could use your kernel both with I2S (which I still have not set up) and USB.

Unless there is some incompatibility I cannot see.

Many thanks for all your work.

Giulio
 
H

Herznn

Member
Joined 2013
please help me:
Can I connect the resonators 45.1584/49.152 MHz without divider?

from Botic description file:
--------------------------------
External masterclock frequencies
--------------------------------
External masterclock frequency for 44k1 is configurable via:
- kernel option snd_soc_botic.clk_44k1
- file /sys/module/snd_soc_botic/parameters/clk_44k1
Default value: 22579200 (45158400)?

External masterclock frequency for 48k is configurable via:
- kernel option snd_soc_botic.clk_48k
- file /sys/module/snd_soc_botic/parameters/clk_48k
Default value: 24576000 (49152000)?
 
stijn001

stijn001

Member
Joined 2011
Ok, so call me a total nob ;) . I'm trying to use the instruction and am not finding: "Installed clocks are configurable via: - kernel option snd_soc_botic.ext_masterclk", Kernel is not found as a command. I do see a related file in, /sys/module/snd_soc_botic/parameters

How do I access/change this "kernel option"?
 
M

miero

Member
Joined 2011
giulio: ok, scheduled on 5th January


Herznn: probably not, but it's worth a try... just make sure that voltage is not larger than 3.3V and they are not powered without BBB

stijn001: it's written on the webpage...

-----------------------
Changing kernel options
-----------------------

Kernel options can be changed in the uEnv.txt file, which can be edited:
- within Linux on BBB: /boot/uboot/uEnv.txt ... for example it can be edited by 'nano' command
- using SD card: uboot/uEnv.txt file on the first partition
 
T

twluke

Member
Joined 2012
miero said:
-snip-
Herznn: probably not, but it's worth a try... just make sure that voltage is not larger than 3.3V and they are not powered without BBB
-snip-
Click to expand...

Well, I tried a Crystek 45.1584 MHz clock (CCHD-957) for the botic driver and it worked well by sending "echo 45158400 > /sys/module/snd_soc_botic/parameters/clk_44k1".

clock.jpg

Shown below is the MCLK and BCK wave forms between those 22.5792 and 45.1584 clocks in the picture above, with the same condition of playing a DSD128 source. Please notice that a tendency of overshooting seen in 22.5792 clock wave form, maybe partly due to an impedance mismatch of the probe, disappears in the 45.1584 one, giving me an impression of sightly better clarity of sound on listening (maybe placebo ;-) ).

NewFile7.jpg NewFile9.jpg

Regards,
 
C

Chanh

Member
Joined 2013
twluke said:
Well, I tried a Crystek 45.1584 MHz clock (CCHD-957) for the botic driver and it worked well by sending "echo 45158400 > /sys/module/snd_soc_botic/parameters/clk_44k1".

View attachment 455920

Shown below is the MCLK and BCK wave forms between those 22.5792 and 45.1584 clocks in the picture above, with the same condition of playing a DSD128 source. Please notice that a tendency of overshooting seen in 22.5792 clock wave form, maybe partly due to an impedance mismatch of the probe, disappears in the 45.1584 one, giving me an impression of sightly better clarity of sound on listening (maybe placebo ;-) ).

View attachment 455922 View attachment 455923

Regards,
Click to expand...
Hi twluke,

Many thanks for your feedback!
Can I confirm that you simply amended the numerical from 22.xx to 45.xx? Or we must precisely type "echo 45.xx"?
I will give this a trial tomorrow and report back.

Cheers
 
T

twluke

Member
Joined 2012
Herznn said:
This is good news!
Are you oscillators connected directly? Powered by what? No signal resistor and decoupling?
Click to expand...

As this is just an experiement for now, 3.3V was drawn on the clock VDD from the BBB power rail directly (P9_3/4) with a 0.1uF decoupling cap between VDD and GND of the oscillator. A dedicated PSU may offer better results which I think can be obtained from Hermes/Cronus series.

Regards,
 
T

twluke

Member
Joined 2012
Chanh said:
Hi twluke,

Many thanks for your feedback!
Can I confirm that you simply amended the numerical from 22.xx to 45.xx? Or we must precisely type "echo 45.xx"?
I will give this a trial tomorrow and report back.

Cheers
Click to expand...

Thank you for your interest. Yes, you have to precisely type the command line including the correct number of the clock frequency like below:

echo 45158400 > /sys/module/snd_soc_botic/parameters/clk_44k1

Or, if you want to have this setting as a default, you might add it to uEnv.txt as a kernel option like below:

optargs=coherent_pool=1M -snip- snd_soc_botic.clk_44k1=45158400

I think this has been already indicated in the miero's instruction.

Regards,
 
C

Chanh

Member
Joined 2013
twluke said:
if you want to have this setting as a default, you might add it to uEnv.txt as a kernel option like below:

optargs=coherent_pool=1M -snip- snd_soc_botic.clk_44k1=45158400
Click to expand...
Thanks Twluke for your inputs, it is working fine for one family clock.
Not sure How do I get both to work? Basically, I type two lines in uEnv.txt;
optargs=coherent_pool=1M -snip- snd_soc_botic.clk_44k1=45158400
optargs=coherent_pool=1M -snip- snd_soc_botic.clk_48k=49152000

After Reboot showed only 48k is set to 49152000 but 44k1 was still remained as default. When I swapped the comandlines order, after reboot showed the 48k is now remained as default but 44k1 is configured to 45158400. As it seems only one will work but not two?

How do I get both configured to new values?

Many thanks.
Chanh
 
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