Your opinions are sought on Audio Power Amplifier Design: 6th Edition. Douglas Self

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Vostro

Vostro

Member
Joined 2012
Hi Carlos when you say discrete do you mean that you don't want to use ICs?
If you use a classD 'Driver' IC then there are some manufactures that give lots of info and even reference layouts on their Datasheets.
I know nothing about classd :D
Here are some links on some basics. Which I bet everyone knows already, I'll post anyway

http://www.irf.com/product-info/datasheets/data/irs2092.pdf
http://www.cybernet.co.jp/beetech/product/designkit/pdf/Class_D/class_d_audio_amplifier.pdf
http://www.inductor.com/irf/iraudamp7d.pdf
http://www.irf.com/product-info/audio/classdtutorial606.pdf
 
destroyer X

destroyer X

R.I.P.
Joined 2004
youtube.com/channel/UC9xnp-350vDnDhEpNv_XVxg
Yes..... i do not like chips..... black boxes ..... i do love to tweak

I love discrete...i do prefere to build something at a size of a refrigerator than to use a single chip.

Class D.... usually are integrated... reason why i am searching for a transistor units that are more pleasant to me.

I do not like the "mistery"...what is inside?.... i want to fix, to adjust and to repair..chips you replace..... lack of art.... i am a builder, not a replacer.

Thanks dear Vostro.

regards,

Carlos
 
JensRasmussen

JensRasmussen

Member
Joined 2002
DouglasSelf said:
But why is that an advantage?

??? Tracking of what?

Surely having different AC and DC gains is going to require more components.

Are you saying THD would be improved? How ???
Click to expand...

THD can be optimized also by choosing the right DC bias point
Currents
NO - fewer semis - more passives - fewer total
YES - fewer non linear parts are used in VAS
….
I'm working on getting a simulation together so notes can be compared - so far the circuit proposed performs better than circuit shown in figure 8.18 editions 6.

I have not been able to simulate the circuit in figure 8.21 where current mirrors are deployed to improve input diff amp. BIAS point is failing.

Plot shows:
Green: "Alternative circuit"
Blue: Figure 8.18 circuit - other multi pole compensation
Red: Figure 8.18 circuit with alternative output stage - other multi pole compensation

All circuits have the same compensation network.

If I use Cdom=100p in all 3 circuits, the pattern is the same.... alternative circuit is still better.

Best regards
\\\Jens
 

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JensRasmussen

JensRasmussen

Member
Joined 2002
Edmond Stuart said:
>I have not been able to simulate the circuit in figure 8.21 where current mirrors are deployed to improve input diff amp. BIAS point is failing.

Of course that circuit doesn't work. You will need a Common Mode Contol Loop (CMCL) to define the TIS standing current. Have a look here.

Cheers, E.
Click to expand...

It was not meant as a question :)

Thanks for the link :worship:

\\\Jens
 
Edmond Stuart

Edmond Stuart

Member
Joined 2003
data-odyssey.nl
More gain

JensRasmussen said:
[..]
THD can be optimized also by choosing the r
I'm working on getting a simulation together so notes can be compared - so far the circuit proposed performs better than circuit shown in figure 8.18 editions 6.

I have not been able to simulate the circuit in figure 8.21 where current mirrors are deployed to improve input diff amp. BIAS point is failing.
[..]
\\\Jens
Click to expand...
Hi Jens,

So you are tying to improve fig. 8.18, because the original circuit lacks some gain. Fig. 8.21 provides more gain, but together with a CMCL, it will cost you about 10 extra trannies. For this reason I also tried to increase the gain by decoupling the emitter resistors of the TIS, just as you did in post #576. However, under overload conditions, the TIS standing current (bias) will shift away from its nominal value. I don't like this and you probably as well. To overcome these issues, you'll need a radically different approach: Just add some gain by means of a complementary emitter folower (only two trannies) behind the TIS (for an example, see the SuperTIS).

Cheers, E.
 
Last edited:
JensRasmussen

JensRasmussen

Member
Joined 2002
Edmond Stuart said:
Hi Jens,

So you are tying to improve fig. 8.18, because the original circuit lacks some gain. Fig. 8.21 provides more gain, but together with a CMCL, it will cost you about 10 extra trannies. For this reason I also tried to increase the gain by decoupling the emitter resistors of the TIS, just as you did in post #576. However, under overload conditions, the TIS standing current (bias) will shift away from its nominal value. I don't like this and you probably as well. To overcome these issues, just add some gain by means of a complementary emitter folower (only two trannies) behind the TIS (for an example, see the SuperTIS).

Cheers, E.
Click to expand...

(I think) I have overload conditions under control by using a current limited buffer.

I will have to try the CMCL circuit to see what it can give.... transistors are almost free these days... and I don't have to mount them :)

Best regards
Jens
 
JensRasmussen

JensRasmussen

Member
Joined 2002
Edmond Stuart said:
The SuperTIS is better and simpler than fig. 8.21 + CMCL.
Cheers. E.
Click to expand...

Better is many things.... In my application I don't want lot's of 5mA current sources....everything must be optimized for performance at low idle currents :)

I aim for a design running at ±60, while idle losses are minimized Capable of 150W into 8 ohms....

At ±30V I want less than 2W idle power.

Best regards
Jens
 
D

Dave Zan

Member
Joined 2010
JensRasmussen said:
... have the same DC and AC gain (From input to output of VAS) – is there a specific reason...
Click to expand...

Hi Jens

In the absence of interest from Mr Self you may want to read Edward Cherry's analysis of this.
It was published in JAES May 1982 "Feedback, Sensitivity and Stability of Audio Power Amplifiers"
He finds stability benefits from an un-bypassed VAS emitter resistor but makes no recommendation about the bypass capacitor.
The analysis is not that often referenced, perhaps because it is an impressive piece of maths but not that easy to understand,
So I have simulated this and found the bypass capacitor can be helpful if properly used. I am still in the middle of this so no definitive analysis yet.

Edmond Stuart said:
I also tried ... the emitter resistors of the TIS, just as you did in post #576.
Click to expand...

Cherry's article may interest you too, if you have not already read it.
I have a new CMCL that I like, adds only a few transistors to the front end and lets me use a simple OPS so overall it's pretty nice.
Is an LTSpice ASC of any interest to you?

Best wishes
David
 
Edmond Stuart

Edmond Stuart

Member
Joined 2003
data-odyssey.nl
Dave Zan said:
[..]
Cherry's article may interest you too, if you have not already read it.
I have a new CMCL that I like, adds only a few transistors to the front end and lets me use a simple OPS so overall it's pretty nice.
Is an LTSpice ASC of any interest to you?

Best wishes
David
Click to expand...

Hi David,

I've read Cherry's article already. Thanks anyhow.

Regarding bypassing the TIS emitter resistors (R9 & R12) in fig. 8.18, I think it's a different case. This TIS has a rather low current gain: about 28x (because of the resistive loading of the IPS by R1 & R3), while Cherry's circuits uses a current mirror. Bypassing R9 & R12 with only capacitors might impair the stability, but Jens proposed to use RC networks. This also makes it a different case.

>Is an LTSpice ASC of any interest to you?
Yes, I love to see it!

Cheers, E.
 
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