ADC using ES9102/9112

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...... Acko can you talk to ESS so that forum members get access to manuals?

I will check and see what can be supplied with the boards especially for support.

HW mode has limitations as indicated earlier so would recommend SW mode for most cases. To support this there will be an MCU module that can also be connected to a PC or other devices. Abstracted information about the ADC registers will be made available as command functions without the need for I2C programming. Very similar to the AKC12 MCU for the DAC. Looking into special low price offer for early adopters of the AKA102 ADC boards :)
 
Sensitivity is line level but Input impedance is low ~200 ohm, typical of most ADCs and requires a preceeding stage with good drive capability. If your front end equipment like preamp/headamp can provide this then connect directly, otherwise a buffer is required.

Most ADC's have much higher IP impedance. This low IP Z is definitely specific to ESS ADC only. Most are a few k.

Generally ADC should have analog stage to null common mode signal component and it really should be close to ADC chip. Unless the ESS ADC
has uncommonly high CM IP compliance and very high CMRR, this really is the
case.

Do they have a recommended drive impedance for getting data sheet results?

Also the drive amp should be able to cope with, or be adequately isolated
from ADC noisy (load wise) switched cap IP circuitry.

T
 
Most ADC's have much higher IP impedance. This low IP Z is definitely specific to ESS ADC only. Most are a few k.

Generally ADC should have analog stage to null common mode signal component and it really should be close to ADC chip. Unless the ESS ADC
has uncommonly high CM IP compliance and very high CMRR, this really is the
case.

Include a line level buffer for this purpose?
 
Most ADC's have much higher IP impedance. This low IP Z is definitely specific to ESS ADC only. Most are a few k.
T

Thanks Terry,
There are ADCs with built-in buffered inputs for high IP Z and easy interface but other types have none so an external buffer is required to drive the ADC inputs. Suitable buffer module will be offered after the main ADC design is completed.
 
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Thanks Terry,
There are ADCs with built-in buffered inputs for high IP Z and easy interface but other types have none so an external buffer is required to drive the ADC inputs. Suitable buffer module will be offered after the main ADC design is completed.

I am referring to VHQ sota ADC's. For example PCM4222 and AK5394 both
have unbuffered IP's with a few k IPZ.
 
I am referring to VHQ sota ADC's. For example PCM4222 and AK5394 both
have unbuffered IP's with a few k IPZ.

Thanks again, Terry.
You are right, most other ADCs have higher Zin but regardless of that some sort of immediate front end is required to match the "common mode" levels of most ADCs and also have differential drive capability. I am not sure if this type matching can be provided by typical preamps or headamps. So a suitable buffer design is inevitable.
 
Buffer Module

Piggyback?

Yes, something like that.
Has provisions for adjusting gain to suit required sensitivities (default Av=1)
Takes both single-ended or differential line level signals. High Zin and high output drive capability with noise filters to match the 9102 ADC. Supplied as finished module only. Preview- TBA
 
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There are ADCs that are designed to have a 10k ohm input impedance like the WM8782. I'm not sure if this would be of interest to you, but I have tested an implementation of one and it is not too bad.... It will do 24/192:
http://www.wolfsonmicro.com/documents/uploads/data_sheets/en/WM8782.pdf
See the recommended circuit on page 19.

Thanks!
I am sure we will learn from different systems out there :)
P.S. ESS ADCs have better SNR, DNR and THD figures than this Wolfson chip
 
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